vjcro
Joined: 14 Mar 2009
Posts: 2
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 28 Jun 2009 9:56 communicate gpio to serial device |
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Hello,
I'm quite new in programming microcontrollers.
I was wondering, if I want to make a 'clock' on a GPIO, what would be it's maximum rate? I suppose - if I put, for example: RB1=1, then RB1=0 in a loop, the clock rate will be twice the time of the execution time of the used instruction. Am I right?
The thing I would like to do is to accomplish my own simple serial communication with a FPGA. The uC would generate the serial clock on a pin and the FPGA would send the bits on a data pin.
One more question regarding this: is there a boundary regarding the serial clock rate in that kind of communication?
I would appreciate any help!
Thank you in advance.
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doraemon
Joined: 21 Jun 2009
Posts: 141
Helped: 17
Location: Japan
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28 Jun 2009 12:53 serial clock rate |
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Hello!
Basically what you want to do is bit banging.
In this case, you may consider to have a standard transmission like
SPI. If you send a clock to your fpga and get one bit per clock, then
it is exactly what SPI does. But it will take you quite a few steps for each
bit.
If you transmit a byte like this (in pseudo code):
This supposes that one bit comes on rising edge of the clock.
| Code: |
const char BIT[] = {
0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01
}
uint8 receive_byte(void) {
uint8 i;
uint8 retval = 0;
for(i = 0 ; i < 8 ; ++i) {
set_clock_bit_low();
set_clock_bit_high();
get_data_bit();
if(data_bit) ret_val |= BIT[i];
}
return retval;
} |
So as you see, it will take more than twice the instructions to set and reset
the port to get some usable data.
Dora.
| vjcro wrote: |
Hello,
I'm quite new in programming microcontrollers.
I was wondering, if I want to make a 'clock' on a GPIO, what would be it's maximum rate? I suppose - if I put, for example: RB1=1, then RB1=0 in a loop, the clock rate will be twice the time of the execution time of the used instruction. Am I right?
The thing I would like to do is to accomplish my own simple serial communication with a FPGA. The uC would generate the serial clock on a pin and the FPGA would send the bits on a data pin.
One more question regarding this: is there a boundary regarding the serial clock rate in that kind of communication?
I would appreciate any help!
Thank you in advance. |
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