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wateror
Joined: 26 Aug 2007
Posts: 81
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 17 Jun 2009 9:00 is 7.5mm*7.5mm a big chip for 0.35um CMOS technology? |
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| I am designing a IC which may need 7.5mm*7.5mm area. Is there any possible issue in such a big chip? thanks
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deepak242003
Joined: 24 Dec 2008
Posts: 204
Helped: 10
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17 Jun 2009 9:08 is 7.5mm*7.5mm a big chip for 0.35um CMOS technology? |
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| well there might be lot of process dependendent issues. WHich proces your are working on??
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shashikumar.22
Joined: 24 Jan 2009
Posts: 10
Location: Nagpur
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17 Jun 2009 13:32 Re: is 7.5mm*7.5mm a big chip for 0.35um CMOS technology? |
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There will be a lot of issues if you are a new designer, but incase you know some of the basic issues which again are process dependent then there will not be a big issue. But the size is chip is big enough so you have to take care of the coupling between the interconnects and the possible delay caused by them  . Also it depend upon the density of your design.
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oermens
Joined: 19 Nov 2005
Posts: 331
Helped: 37
Location: canada
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17 Jun 2009 13:50 is 7.5mm*7.5mm a big chip for 0.35um CMOS technology? |
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| depends what you're designing... for a transceiver thats okay... for an inverter you're going a bit overboard...
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wateror
Joined: 26 Aug 2007
Posts: 81
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28 Jun 2009 16:23 is 7.5mm*7.5mm a big chip for 0.35um CMOS technology? |
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| yeah, thanks,everyone
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