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Clock generation with JK flip flop
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robismyname



Joined: 17 Jan 2008
Posts: 163
Helped: 2
Location: Central Florida
Post28 May 2009 17:47   

jk flip flop clock
I am utilizing a 26 MHz TCXO along with a JK flip flop to generate a 13MHz clock that is needed for another IC. My question is on what pin of the JK Flip Flop do I connect the 26 MHz TCXO? Clock, J or K?
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trekkytekky



Joined: 04 Apr 2009
Posts: 77
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Location: Perth
Post29 May 2009 13:09   

54ls107 toggle frequency
If your using this IC (SN74/54LS107) then connect your oscillator to the clock pin and tie J,K and clear (CLR) high. the output will toggle on the falling edge (divide by 2)
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robismyname



Joined: 17 Jan 2008
Posts: 163
Helped: 2
Location: Central Florida
Post31 May 2009 17:18   

sn74 j k

trekkytekky wrote:
If your using this IC (SN74/54LS107) then connect your oscillator to the clock pin and tie J,K and clear (CLR) high. the output will toggle on the falling edge (divide by 2)


will connecting J,K and clear (CLR) to VCC be good enough?
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trekkytekky



Joined: 04 Apr 2009
Posts: 77
Helped: 6
Location: Perth
Post31 May 2009 17:50   

how clock work in jk flip flop
Connecting to Vcc would be fine, it will pull the inputs high. Just be aware that the 107 has a minimum clock low duration of 47nS and a max frequency 30MHz from the datasheet you posted. So your tcxo may be to fast for it depending on the duty cycle of its output. Only way to find out for sure is to try it and see. If it does work the output of the Flip Flop will be a 50% duty cycle, irrespective of the input duty cycle.
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