srinivasan.n
Joined: 18 May 2009
Posts: 1
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 18 May 2009 11:32 post diploma in embedded system in chennai |
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PATE pantech academy of technical excellence is an institution of higher learning with a mission that incorporates teaching, research, creative activity and service. PATE has state-of-the-art facilities for Embedded systems, Digital signal processing, high-end VLSI, JAVA, .NET, Programmable Logic and system design training. Facilities include modular classrooms, fully networked and web-enabled workstations for every student apart from high end Windows based systems. It is also equipped with complete suite of EDA tools.
Being a part of pantech solutions pvt ltd, a product realization company, PATE is proficient enough to provide with the highest quality training in INDIA. A comprehensive start-to-finish curriculum ensures that one gains proficiency and confidence in both the basic and advanced features. The hands-on Courses are designed to accelerate learning curve and prepare to face the industries expectations on the day one.
* Higher Diploma in Embedded Computing Systems (HDECS)
* Higher Diploma in Digital signal processing (HDDSP)
* Higher Diploma in VLSI (HDVLSI)
* Higher Diploma in JAVA programming (HDJP)
* Higher Diploma in .NET programming (HD.NETP)
* Higher Diploma in Power Electronics using DSP (HDPED-DSP)
* Higher Diploma in Power Electronics using FPGA (HDPED-FPGA)
* Higher Diploma in High speed Digital Design (HDHSDD)
* Embedded system design using 8 bit microcontroller (8051) (S-HT 8051)
* Embedded system design using 8 bit microcontroller (PIC) (S-HT PIC)
* Embedded system design using 8 bit microcontroller (AVR) (S-HT AVR)
* Embedded system design using 8 bit microcontroller (renesas) (S-HT R8C tiny)
* Embedded system design using 32 bit microcontroller (arm) (S-HT ARM)
* Wireless embedded systems (S-HT WES)
* Real time operating system –uclinux (S-HT RTOS)
* System development and programming using the ADSP-BF533/7 families (S-HT BF)
* Digital signal processing using SHARC (S-HT SHARC)
* Porting UCLinux on BLACKFIN (S-HT UC BF)
* Matlab for Image Processing (S-HT MATDIP)
* CPLD & FPGA Design using VHDL (S-HT CF VHDL)
* CPLD & FPGA Design using Verilog (S-HT CF Verilog)
* FPGA Design and application using C (S-HT FPGA C)
* Advanced FPGA Implementation (S-HT AFPGA)
* Minimizing Design Time with the Chip Scope Pro Debug & verification tools(S-HT CS-PRO)
* Embedded Systems Development using Xilinx FPGA (S-HT ESD XFPGA)
* Advanced Embedded Systems Development using Xilinx FPGA (S-HT AESD XFPGA)
* Embedded Systems Software Development using Xilinx FPGA (S-HT ESSD XFPGA)
* Embedded Open-Source Linux Development using Xilinx FPGA (S-HT OS XFPGA)
* AccelDSP Synthesis Tool (S-HT Accel DSP Syn)
* DSP Design Using System Generator (S-HT DSP SYS GEN)
* DSP Implementation Techniques for Xilinx FPGAs (S-HT DSP XFPGA)
* FPGA design using ALTERA FPGA (S-HT ALTERA FPGA)
* FPGA Design using DSP Builder (S-HT DSP BUILD FPGA)
* Embedded system design using Nios® II embedded processor (S-HT ESD NIOSII)
* Designing with the Nios II Processor and SOPC Builder (S-HT SOPC NIOSII)
www.pantechprojects.com
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