Internal pull up/pull down in FPGA's

EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> Internal pull up/pull down in FPGA's

Author

Message

kiranec2004

Joined: 23 Mar 2009
Posts: 1

24 Mar 2009 5:57 Internal pull up/pull down in FPGA's

Hi

If for any IO's internal pullup/pulldown is defined inside FPGA then can we remove the externally mounted resistors for pullup/pulldown on the PCB ???

Thanks in advance

Google
AdSense
Google Adsense

24 Mar 2009 5:57 Ads

MagixD

Joined: 19 Jun 2008
Posts: 16
Helped: 3

24 Mar 2009 10:01 Re: Internal pull up/pull down in FPGA's

Hello,

That's right, you can remove your extrenal resisters if you are using the internal pullup/pulldown options in your FPGA. Also, some FPGAs allow on-chip terminating to terminate RF transmission lines. This is used for high-speed memorys like DDR SDRAM, for example.

Best regards,
magixD