clock and data recovery

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vinod_g

Joined: 29 Nov 2006
Posts: 72
Helped: 6

30 Dec 2008 7:10 clock and data recovery

I require CDR( Clock and data recovery) module. Is it already available in FPGA or we have to design?

ducna

Joined: 19 Jan 2006
Posts: 16

06 Jan 2009 5:06 Re: clock and data recovery

I am familar with Xilinx, so I have no idea for other families, but i think they are quite the same. In Xilinx, the is no integrated CDR part; however, luckily there are some App Notes such as : xapp224, xapp250, xapp868, ... very usuful for CDR applications. Also, you can check on the Internet with google, there is a lot of information for you

Hope this helps,

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amitjagtap

Joined: 10 Jan 2007
Posts: 124
Helped: 6

23 Jan 2009 11:53 clock and data recovery

hi
In some FPGA CDR is there. In Xilinx FPGA Clock managers are there. U can design a simple clk n data recovery ckt using edge detector and high frequency counter....