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haneet
Joined: 07 Nov 2006
Posts: 149
Helped: 15
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 22 Dec 2008 3:36 how write a Look Up Table |
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hi frndz,
Can you guyz tell me how to write a Look Up Table in verilog? I know the method of using Case statement and writing. But, is there a short cut where we can write the values?
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banjo
Joined: 24 Dec 2005
Posts: 644
Helped: 118
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23 Dec 2008 4:47 how write a Look Up Table |
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Large Look Up Tables are really ROM memories. You can instantiate a memory in verilog and then give each memory location an initial condition in the test bench. I have also loaded these testbench memories from an external file in the test bench.
In real FPGAs you have to use RAM, since ROM is not available.
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lordsathish
Joined: 11 Feb 2006
Posts: 268
Helped: 28
Location: Asia
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23 Dec 2008 9:14 Re: how write a Look Up Table |
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Is the ROM for any FPGA...?
Your FPGA tool, supposing Xilinx ISE must have applications(core generator) to generate it automatically...
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