VHDL-AMS: Discontinuos problem

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electronics_sky

Joined: 09 Feb 2006
Posts: 64
Helped: 1

12 Dec 2008 14:50 VHDL-AMS: Discontinuos problem

Hi there,

i am doing some VHDL-AMS coding with Mentor Graphics's ADVanceMS. However i am facing some discontinuos problem. My coding is as below:

------------------------------------------------------------
architecture TEST of CNT is
quantity VA1 across A1;
quantity VB1 across IB1 through B1;
quantity VC1 across IC1 through C1;
quantity Q_1: real := 0.0;

begin
if RESET = '0' use
VB1 == VA1;
else
VB1 == 0.0;
end if;

Q_1 == VB1*2.0;

if not Q_1'above(5.0) use
VC1 == Q_1;
else
VC1 == 5.0;
end use;

break on RESET,Q_1'above(5.0) ;

end architecture;

----------------------------------------------------------------------

however i am facing discontinuos probelm (a spike occure during the condition state is true)due to "if not Q_1'above(5.0) use". The code seems like better if i am writing the condition as "if Q_1 < 5.0 use", however the simulator display warning if 'above is not use for quantity comparison.

Please kindly enlighten me in this issue. Thank.

electronics_sky

Joined: 09 Feb 2006
Posts: 64
Helped: 1

15 Dec 2008 12:20 VHDL-AMS: Discontinuos problem

Dear AMS designer,

Please kindly help me to solve this problem.

Thank you!!

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alinalin19832007

Joined: 16 Oct 2008
Posts: 9
Helped: 3

16 Dec 2008 16:36 Re: VHDL-AMS: Discontinuos problem

use this and try to simulate it:

architecture TEST of CNT is
quantity VA1 across A1;
quantity VB1 across IB1 through B1;
quantity VC1 across IC1 through C1;
quantity Q_1: real := 0.0;

begin
if RESET = '0' use
VB1 == VA1-VB1'dot*1.0e-7;
else
VB1 == 0.0-VB1'dot*1.0e-7;
end if;

Q_1 == VB1*2.0;

if not Q_1'above(5.0) use
VC1 == Q_1-VC1'dot*1.0e-7;
else
VC1 == 5.0-VC1'dot*1.0e-7;
end use;

break on RESET,Q_1'above(5.0) ;

end architecture;
-------------------------------------
this modifications should solve your problem
u can decrease 1.0e-7 number if the error persist.

tell me if this solve your problem

bye

electronics_sky

Joined: 09 Feb 2006
Posts: 64
Helped: 1

02 Feb 2009 14:34 VHDL-AMS: Discontinuos problem

Hi alinalin19832007,

Sorry for the late reply.

It helps me to solve the discontinuity problem. However, can i know why the problem occur and why the solution can solve it.

thank you so much!!

alinalin19832007

Joined: 16 Oct 2008
Posts: 9
Helped: 3

03 Feb 2009 16:52 Re: VHDL-AMS: Discontinuos problem

This solution will filter a little bit the quantity (the slew rate).

electronics_sky

Joined: 09 Feb 2006
Posts: 64
Helped: 1

04 Feb 2009 13:09 VHDL-AMS: Discontinuos problem

hi there,

can you explain why the problem occurred?

As i know, if we are using "break on", this problem should not occur. However, the "break on" command doesn't seem to function here.

Can i change the modelling method to avoid the problem rather than filtering it?

Thank yo