clocking problem - special component to drive clock lines?

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Psyfusion

Joined: 01 Mar 2006
Posts: 9

08 Dec 2008 20:17 clocking problem

Hi!

I have to design a system with 3 independent fpga cards in it. I have to provide synchonous clock from one source to all 3 cards. The distance from the oscillator to the fpga-s is about 3-4 inches. Please help me out! Suggest any method to do this!
The clock frequency is 50MHz.
Do I need some kind of special component to drive the clock lines?
Or should i have a local clock source and somehow synch. them? If yes how to do it?

Please help, its urgent!

Thanx! Very Happy

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lordsathish

Joined: 11 Feb 2006
Posts: 268
Helped: 28
Location: Asia

18 Dec 2008 14:35 Re: clocking problem

If you think there could be skew to the clocks in the 3 FPGA's, then i guess using some synchronization like PLL could solve your problem.

Rainbow00

Joined: 23 Feb 2006
Posts: 24

22 Dec 2008 10:31 clocking problem

pls check the clock driver spec to figure it out whether what kind of loading it can drive. design your clock distribution carefully.

route the clock to the dedicated clock input of the FPGA. the DCM block inside the FPGA allows you to compensate the skews on the PCB board.