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Johnson
Joined: 04 Oct 2004
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 04 Dec 2008 8:29 altium logo |
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| What is Altium Dashboard on new release "winter09"?
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House_Cat
Joined: 21 Feb 2002
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04 Dec 2008 22:53 Re: Altium's Dashboard |
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It's an FPGA instumentation interface. See the PDF.
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Johnson
Joined: 04 Oct 2004
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05 Dec 2008 7:25 @ltium's Dashboard |
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Is this support restricted to specific Altium boards, or it is general? Can I develop a custome board with nanoboard interface and use this interface? If Yes, it is great progress!
Altium claim that it is free, but I can not find download link at Altium site!
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House_Cat
Joined: 21 Feb 2002
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05 Dec 2008 22:49 Re: Altium's Dashboard |
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Here's what Altium says about the dashboard:
"The new instrument dashboard can be downloaded and installed on any PC, without having to run a full license of Altium Designer. The remote dashboard interacts with the instruments programmed inside the FPGA by the designer, so that users can now test or service the device, or look to add advanced services to the product once it's in the field."
It uses the soft devices JTAG chain.
As far as I know, they haven't made it available for download yet.
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Johnson
Joined: 04 Oct 2004
Posts: 730
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06 Dec 2008 22:30 @ltium's Dashboard |
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| Is new release of AD compatibile with Vista 64? I remember that previous version was not!
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House_Cat
Joined: 21 Feb 2002
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08 Dec 2008 21:11 Re: Altium's Dashboard |
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The problem is Vista64, not Alium Designer. Altium software is 32bit. Vista64 runs 32bit programs in a shell that Microsoft calls WOW64. Some programs don't respond well in that environment.
Having said that, several folks are successfully running AD under Vista64. You ablity to do so depends heavily on your hardware and drivers.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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08 Dec 2008 23:26 @ltium's Dashboard |
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| I was checking release notes to find out what is major change for designers. It looks that some change in routing, link to manufacturer data base, and dashboard are majors changes. Any opinion? They need to release software for bug fix or financial reasons, but main question for us, "Should I switch to new release?"
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House_Cat
Joined: 21 Feb 2002
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09 Dec 2008 1:23 Re: Altium's Dashboard |
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| It depends on how valuable the new features are to you. If via stacks, multiple track routing, 3D/MCAD interface, Cadstar PCB import, and manufacturing checks like net antennas, mask slivers, and silkscreen clearances, are important to you - it's worth the upgrade. If none of those things are important, then sit it out until Summer 09 comes out.
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Johnson
Joined: 04 Oct 2004
Posts: 730
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11 Dec 2008 6:11 @ltium's Dashboard |
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In addition to import, sometimes we need exporting! Suppose that for any reason we want to do the routing in Allegro, or PADS. How we can do it?
Another issue with AD is versioning and version control. Last time that I tried it, it was not real version controlling. Do you have any experience?
As a direct result of that issue, team working is not implemented in AD. Indeed AD is improving by reusable blocks, but it is still single engineer tool!
However it is my favorite PCB design tool, and I hope it will improve and cover very important issue like signal integrity as well as the above issue.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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11 Dec 2008 22:04 @ltium's Dashboard |
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Last time (AD summer 0 I tried to use 3D, but it was really slow. But now with same GC it is smooth and fast. Looks that they are doing well in this issue.
- I was looking for possibility of controlling 3D view per component. I mean how we can let one component to be viewed while other one not. Possible use of this feature is when you want to place one small components(line res and caps) under other big and tall components like LCDs.
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House_Cat
Joined: 21 Feb 2002
Posts: 1507
Helped: 307
Location: USA
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12 Dec 2008 3:54 Re: Altium's Dashboard |
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| From the PCB Panel, you can turn off components in the 3D view. Set the PCB Panel to 3D Models. All you need do is click on the blue cone in the right column of the panel.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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12 Dec 2008 7:49 Re: @ltium's Dashboard |
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Yes, thanks I got it. By disabling 3D view DRC rules are still active, yes?
Regarding dashboard, I suggest that as a next step programmers will ask for avaliable functions and maybe dll to use dashboard instruments in their own software, is anything avaliable now?
In demo boards of AD and on silkscreen layer a box containing 4-digit in Crystal Font appeared, it is for putting year or somthing like that. It is 8888 now! I was wondering how we can control it or change it?
Last question, is TTF font and barcode on PCB accetable for manufacturers?
Added after 2 minutes:
Would you take a look at these questions, thanks in advance.
| Johnson wrote: |
In addition to import, sometimes we need exporting! Suppose that for any reason we want to do the routing in Allegro, or PADS. How we can do it?
Another issue with AD is versioning and version control. Last time that I tried it, it was not real version controlling. Do you have any experience?
As a direct result of that issue, team working is not implemented in AD. Indeed AD is improving by reusable blocks, but it is still single engineer tool!
However it is my favorite PCB design tool, and I hope it will improve and cover very important issue like signal integrity as well as the above issue. |
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12 Dec 2008 7:49 Ads |
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House_Cat
Joined: 21 Feb 2002
Posts: 1507
Helped: 307
Location: USA
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12 Dec 2008 20:16 Re: @ltium's Dashboard |
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Yes.. DRC is still available even when 3D bodies are hidden.
I don't know if user tools can be used to change the dashboard instruments - they're intended to be programmed into the FPGA from W09.
Tell me what demo board you mean - I don't know what Crystal Font object you are talking about.
TTF and barcode have been available in AD since version 6.3. Nobody has complained about them. Manufacturers seem to find them useful.
AD doesn't export to any other PCB formats. If you want to do a layout in Allegro, or PADS you have to use their import tools to import the AD documents. None of the EDA software exports file formats to a competitors product. You can export netlists to other formats, and you can export to Orcad Capture, Specctra Design files, and PCAD from AD, but you can't export PCB files to Allegro or PADS.
There is extensive version control support in AD/W09. It links to CVS and SVN. Read the tutorial "TU0114 Working with a Version Control System.pdf".
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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13 Dec 2008 2:36 Re: @ltium's Dashboard |
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| House_Cat wrote: |
| Tell me what demo board you mean - I don't know what Crystal Font object you are talking about. |
In ...\Examples\Reference Designs\NanoBoard-NB2DSK-SPK01, at x, y=1500, 700 on bottom silkscreen. above the "Manufactring Date" string.
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House_Cat
Joined: 21 Feb 2002
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14 Dec 2008 5:16 Re: Altium's Dashboard |
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That particular block is an import from a Gerber file or a graphic - it consists of 991 line segments, and cannot be edited on the PCB. It is a simple cut and paste.
If you look up and to the right a bit, you'll see another inverted text box that says "MINUS". If you use that string technique, you can edit the text. Double click on it to see how it's done. You specify "Inverted Text", and select any font you wish.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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14 Dec 2008 10:29 @ltium's Dashboard |
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How to convert image file to PCB element?
Looking at top left of NB2DSK PCB, there are two type of mounting hole:
- The reason of putting via around hole is EMC/EMI related issue or just mechanical?
- How we can manage it, as a single library component or other way?
- Do we need to take special care for planes around mounting holes?
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House_Cat
Joined: 21 Feb 2002
Posts: 1507
Helped: 307
Location: USA
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14 Dec 2008 19:29 Re: Altium's Dashboard |
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You'll need to be more specific about "How to convert image to PCB element" - what kind of image do you want to make into a PCB component?
The ring around the mounting hole is a layer specific keepout - it is not copper. Notice the pink outline around it. That means it won't show up in the Gerber output. It's only there to keep out tracks, and polygons on the top layer. There's another keepout ring on the bottom layer for the same purpose on that layer.
You can make a mounting hole as a library component, or you can just place a pad with an annulus smaller than the hole as a free object on the PCB.
The anti-pad on the plane is set with a Plane Clearance Design Rule for anti-pad size based on the hole size, the component the hole is in, etc. For mounting holes going through a plane, you have to take into consideration possible voltage creep, mechanical wear, and ESD.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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15 Dec 2008 7:53 @ltium's Dashboard |
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| Company logo in bitmap, for example! I suggest that it does not matter which image, does it?
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House_Cat
Joined: 21 Feb 2002
Posts: 1507
Helped: 307
Location: USA
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16 Dec 2008 3:28 Re: Altium's Dashboard |
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To convert a BMP file to a PCB image, you would use the script in the Examples folder "... \Altium Designer Winter 09\Examples\Scripts\Delphiscript Scripts\Pcb\PCB Logo Creator".
You can also copy a BMP or WMF image to the windows clipboard and paste it into a PCB as a union that can be resized.
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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17 Dec 2008 0:37 @ltium's Dashboard |
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It looks that those scripts are useful, I was thinking that those are just programming examples. Is there any document or list regarding those scripts?
Do you have any news about availibility of dashboard?
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Johnson
Joined: 04 Oct 2004
Posts: 730
Helped: 22
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17 Dec 2008 7:07 @ltium's Dashboard |
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Again NB2DSK reference board,
1) Is LCD as a component? Where is the LCD connector? Is it connected to main board by cable? Indeed I am looking for design rule in that area! How we can put one smaller component beneath of taller one without drc violation?
2) There are two special mounting holes for that TFT/LCD with more than 4-way thermal connector which is not definable in design rules? How we can manage it?
3) Around voltage regulator with KTT package, special via/hole array is used which act as a heatsink. Those holes are not part of component, how we can create it and important issue in the case of similar components, how to reuse it?
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House_Cat
Joined: 21 Feb 2002
Posts: 1507
Helped: 307
Location: USA
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18 Dec 2008 2:46 Re: Altium's Dashboard |
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You can download the dashboard from http://www.altium.com/community/downloads/?
1 - The LCD is mounted on the motherboard. It is part HITACHI_TX09D50VM1CAA, and it is flex cable connected to connector LCD1 at about 8449, 1952. You'll see two large arrows on the top overlay pointing toward the connector. The component height design rule relies on the component body to determine clearances. You can give the body a height above the board which allow smaller components to be placed under it. In this case, the applicable rule is "ComponentClearance_Top".
2- The LCD mounting holes are not connected to anything, so I don't know which holes you are talking about.
3- Altium Designer allows you to define a pad as a slot. Those holes are actually sloted pads rotated 45deg. Double click on one of them and you'll see how they are defined. They can be placed one-at-a-time anywhere on the PCB, or they can be included in a footprint. When you generate your NC drill files, you can also automatically generate route paths for the slots. One of the neat things about slotted pads is that they automatically create slotted anti-pads on any planes in your stackup. To create the pattern of slots used on this board, the layout designer probably used what is called "rubber stamp" to place the first row, then copied and pasted the rest from the first row. I would have made a component, but every designer has their own way of working.
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Johnson
Joined: 04 Oct 2004
Posts: 730
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18 Dec 2008 6:49 @ltium's Dashboard |
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- The build number of dashboard (15946) is different from main AD distribution (15895)! Does it mean that update is released?
- Is 45 deg. placement acceptable for pick&place job?
- Same as controlling the visibility of components in 3D, can we control the visibility of internal routing layers?
- There are some polygons in the board without solder mask, but not connected to any net(for example at location: 5348mil, 921mil). What is the usage of them? ESD related issue? if so, why there are not connected to GND?
- A strange shape (spark gap) is on back side of board beneath the ESD Touchpad? Do you know what is it?
- regarding the free FDIC on the board (not related to BGA component), usually fab ask about them, is there any rule where to put them, and how many is enough?
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House_Cat
Joined: 21 Feb 2002
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19 Dec 2008 2:00 Re: Altium's Dashboard |
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The development of the Dashboard continued past the release for W09. No, there's no update for W09 this soon.
Yes, you can have 45deg objects for pick and place. You can have any angle - it's up to your assembly house to tell you if they have any limits.
Of course you can control visibility of layers. You can hit "L" in the 2D display mode and turn layers on or off. You can also set up Layer Sets by clicking on the "LS" box in the lower left corner of the PCB Editor screen. You can also right click on the layer tab at the bottom of the screen and turn the layer on or off.
Those fills are just mechanical landing pads for connectors and daughter boards.
It's a spark gap. Look on the top overlay, and you'll see instructions to "Touch Here First". Any static on your body will be discharged to the shield ground. The spark gap also serves to discharge the board ground to shield ground which should be the same as mains ground.
IPC states "Global and/or panel fiducials should ideally be located on a three point grid based system, with the lower left fiducial located at the 0,0 datum point and the other two fiducials located in the positive X and Y directions.
Global fiducials should be located on all PCB layers that contain components to be mounted with automated equipment. This is true even if the circuit design contains no fine pitch (<= .020” pitch) components, as most modern assembly equipment uses vision recognition for PCB alignment."
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Johnson
Joined: 04 Oct 2004
Posts: 730
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19 Dec 2008 22:41 @ltium's Dashboard |
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- Regarding sloted pads, does it add some amount to mfg cost or is a normal drilling? I want to know that sloted pads requires CNC operation or not?
- In manufacturing process, when drilling is done? Indeed I want to know how they allign layer masks, which looks to be very important.
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House_Cat
Joined: 21 Feb 2002
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20 Dec 2008 2:21 Re: Altium's Dashboard |
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Slotted pads are routed, not drilled. Whether or not it adds cost is up to your fab. The one I use (Gorilla Circuits) doesn't charge extra.
If there are no blind or buried vias, the plated hole drilling is done as the next step after lamination of the board. The holes are drilled and slots to be plated are routed, cleaned, coated with carbon, plated, and cleaned again. The board is then drilled and/or routed again for the non-plated holes and slots, and the holes are cleaned. If you have any gold, silver, or tin plating it is done next. Then the soldermask is applied, and finally the silkscreen is applied.
Masks are optically aligned with the finished board, as are the silkscreens.
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Johnson
Joined: 04 Oct 2004
Posts: 730
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26 Dec 2008 3:45 @ltium's Dashboard |
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| I beleive that in AD library element is not related to stack up, and we can change stack up and use the same library, but in Allegro, based on padstack, library is related to specific stack up. So by changing stack up we need to develop new library, is there any method to avoide it?
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Johnson
Joined: 04 Oct 2004
Posts: 730
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02 Jan 2009 8:27 Re: @ltium's Dashboard |
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| Johnson wrote: |
| I beleive that in AD library element is not related to stack up, and we can change stack up and use the same library, but in Allegro, based on padstack, library is related to specific stack up. So by changing stack up we need to develop new library, is there any method to avoide it? |
-- Any sugesstion?
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House_Cat
Joined: 21 Feb 2002
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03 Jan 2009 6:16 Re: Altium's Dashboard |
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There's really no difference between AD and Allegro footprints when it comes to layer specific objects. You can define a library footprint for just the top and bottom layers, and then use it on a multilayer board. Padstacks are defined in similar fashion in both AD and Allegro. W09 has added via stacks which makes it even more like Allegro.
What makes you think that component footprints are locked to the stackup in Allegro? The same library component can be used in 2 layer, 4 layer, 6 layer, etc.
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Johnson
Joined: 04 Oct 2004
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03 Jan 2009 7:08 @ltium's Dashboard |
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What makes you think that component footprints are locked to the stackup in Allegro?
A. I exported a library from a board and tried to used it in a board with different layer count, but it comes with some error and warnning.
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