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need a rail to rail opamp design


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meysam_abbasinia



Joined: 14 Aug 2007
Posts: 34


Post24 Oct 2008 10:52   

need a rail to rail opamp design


hi,

i need a low power rail to rail opamp with max 200 MHZ BW.
i work in 0.35um and simulate with HSPICE 49 level CMOS.

let design it.

thanks.
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drDOC



Joined: 17 Jul 2008
Posts: 57
Helped: 7


Post30 Oct 2008 11:25   

need a rail to rail opamp design


So what is your question?

It sounds doable. But challenging to optimize the power/bandwidth ratio.
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meysam_abbasinia



Joined: 14 Aug 2007
Posts: 34


Post31 Oct 2008 9:19   

Re: need a rail to rail opamp design


hi,
I need it for a adder and applications like that, this should work full range 0~3.3v
50db or lower gain is suitable and 200Mhz BW is ok for this application,
folded cascode is not suitable because it's bad pole and don't work in that frequency i think!

I want structure of this opamp.

thanks.
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Post31 Oct 2008 9:19   

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drDOC



Joined: 17 Jul 2008
Posts: 57
Helped: 7


Post31 Oct 2008 15:01   

Re: need a rail to rail opamp design


Quote:
folded cascode is not suitable because it's bad pole and don't work in that frequency i think!


Have you tried it? I have witnessed a 115MHz unity gain bandwidth in 0.7um.
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meysam_abbasinia



Joined: 14 Aug 2007
Posts: 34


Post31 Oct 2008 15:44   

Re: need a rail to rail opamp design


Can I see your circuit with W/L of Transistors?
another question is about rail to rail. what should I do for this task? because folded cascod have above 2ΔV and from lower 2ΔV offset.
We should use inverter in output??
I'll very glad if send me your circuit.
thank you .
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