| Author |
Message |
engr
Joined: 28 Jul 2008
Posts: 26
|
 27 Sep 2008 16:45 setup/hold time |
|
|
|
Hi
why we need to have setup and hold times for a flop , i know that without these, flop output goes to metastable state, but why really set and hold need to maintain for a flop
Thanks
|
|
| Back to top |
|
 |
TekUT
Joined: 17 Jun 2008
Posts: 314
Helped: 22
|
|
| Back to top |
|
|
hemant2007
Joined: 14 Jan 2007
Posts: 70
|
| 06 Oct 2008 4:53 Re: setup/hold time |
|
|
|
go thru following link
http://vlsihomepage.com/2007/09/13/setup-and-hold-times/
|
|
| Back to top |
|
|
ramana459
Joined: 01 Apr 2008
Posts: 20
|
| 06 Oct 2008 19:49 Re: setup/hold time |
|
|
|
setup time and hold time are useful for set the time period (Tmax) of the circuit.
If you dont know these values, how can u find out your design is working on this freq.
If your design was not satisfy the setup and hold times you will get garbage values after the simulation.
The setup and hold time values are fixed for cell to cell, you can't modify them, these are given by fab.
|
|
| Back to top |
|
|
au_sun
Joined: 05 Aug 2004
Posts: 147
Helped: 10
|
| 06 Oct 2008 22:35 Re: setup/hold time |
|
|
|
| setup time and hold times are basically is a requirement due to transistor characteristic.
|
|
| Back to top |
|
|
ljxpjpjljx
Joined: 05 May 2008
Posts: 198
Helped: 4
Location: Shang Hai
|
| 07 Oct 2008 6:11 Re: setup/hold time |
|
|
|
| because you need setup and hold time to meet your timing!
|
|
| Back to top |
|
|
