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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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 26 Sep 2008 9:57 A question about fully-diff folded-cascode with sc-cmfb |
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3.3v vdd
presim ac and cmfb are both ok
ac gain=75dB
cmfb gain=70dB
dc operation node OK cm-output=1.65v
but when do c-only postsim
gain is still large
ac=73dB
cmfb=65dB
but cm output voltage is 1.5v!
why?
the op is p-input pair single stage
cmfb connect to p-load of the cascode op
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PaloAlto
Joined: 08 Oct 2007
Posts: 131
Helped: 15
Location: Sevilla, Spain
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| 26 Sep 2008 11:47 A question about fully-diff folded-cascode with sc-cmfb |
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You do a C-only DC OP simulation and vcm is wrong? That shouldn't be the case. C-only is just adding capacitors to your circuit, so, no DC information. What else is changing from one sim to the other? Try to simplify things and post the differences, there should be something more than just the new Cs.
You can also do instead of C-only a lvs-extracted view and see what you get
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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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| 26 Sep 2008 13:32 A question about fully-diff folded-cascode with sc-cmfb |
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I've found the reason!
sa sb is large!
I only know the parameter as ad ps pd
what is sa sb?
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pbs681
Joined: 19 Aug 2004
Posts: 154
Helped: 11
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| 26 Sep 2008 14:25 Re: A question about fully-diff folded-cascode with sc-cmfb |
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| Alan_Nesta wrote: |
I've found the reason!
sa sb is large!
I only know the parameter as ad ps pd
what is sa sb? |
sa and sb is a stress effect parameter. It will affect your Id. Transistor 0.18um and below experience this effect. Just google stress effect u will get a detail explanation. I believe u are using BSIM3. If u r using BSIM4, u will 1 more extra parameter for stress which is sd.....
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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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| 26 Sep 2008 17:53 A question about fully-diff folded-cascode with sc-cmfb |
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| in layout how to decrease sa sb?
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JoannesPaulus
Joined: 19 Mar 2008
Posts: 58
Helped: 8
Location: POLAND
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| 26 Sep 2008 17:57 A question about fully-diff folded-cascode with sc-cmfb |
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| You can't decrease sa and sb, they are a physical dimension of the transistor but you can group the devices so that their sa and sb match.
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pbs681
Joined: 19 Aug 2004
Posts: 154
Helped: 11
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| 27 Sep 2008 4:01 Re: A question about fully-diff folded-cascode with sc-cmfb |
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| Alan_Nesta wrote: |
| in layout how to decrease sa sb? |
sa and sb in term of phisical meaning is a distance from the edge of active (STI) in x-dir to the poly. This distance has minimum requirement in Design Rule, but if ur current transistor is bigger than minimum, u can always reduce it....
or maybe ur extracted netlist has problem with extracted sa and sb. Cjheck ur extracted netlist (unit and order)
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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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| 27 Sep 2008 9:52 A question about fully-diff folded-cascode with sc-cmfb |
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sa sb is about 3-5e-6
is it too large for 90nm process?
my presim set the parameter about 5e-7
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pbs681
Joined: 19 Aug 2004
Posts: 154
Helped: 11
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| 27 Sep 2008 10:59 Re: A question about fully-diff folded-cascode with sc-cmfb |
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| Alan_Nesta wrote: |
sa sb is about 3-5e-6
is it too large for 90nm process?
my presim set the parameter about 5e-7 |
normal value shud be 5e-7.... check ur layout....
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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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| 27 Sep 2008 13:31 A question about fully-diff folded-cascode with sc-cmfb |
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how to check?
I mean how to decrease this parameter in layout?
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pbs681
Joined: 19 Aug 2004
Posts: 154
Helped: 11
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| 27 Sep 2008 16:28 Re: A question about fully-diff folded-cascode with sc-cmfb |
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| Alan_Nesta wrote: |
how to check?
I mean how to decrease this parameter in layout? |
see page 19 of this document: http://www.cdnusers.org/community/virtuoso/resources/ctp_CDNLive2005_1421_Strang.pdf
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Alan_Nesta
Joined: 11 Aug 2005
Posts: 101
Helped: 5
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| 28 Sep 2008 3:36 A question about fully-diff folded-cascode with sc-cmfb |
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I've seen it
but it says sa sb are better when large
really?
my presim shown just inverse
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pbs681
Joined: 19 Aug 2004
Posts: 154
Helped: 11
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| 28 Sep 2008 3:51 Re: A question about fully-diff folded-cascode with sc-cmfb |
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| Alan_Nesta wrote: |
I've seen it
but it says sa sb are better when large
really?
my presim shown just inverse |
What does it mean by "better" here is that, bigger sa and sb will have lesser stress effect. This is different issuea nd story.
For ur issue, u have to makesure that sa and sb in schematic and layout match!
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