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research_vlsi
Joined: 15 Nov 2006
Posts: 89
Helped: 3
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 24 Sep 2008 6:08 Delay in a design |
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I have one doubt
what are the different ways to create delays in a design?
Note: The Logic should be synthesisable.
Thanks
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lordsathish
Joined: 11 Feb 2006
Posts: 244
Helped: 26
Location: Asia
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| 24 Sep 2008 7:13 Re: Delay in a design |
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Could Use a FIFO...
But We could only create Delay of the period equal to the integer Multiples of the clock period.
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research_vlsi
Joined: 15 Nov 2006
Posts: 89
Helped: 3
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| 24 Sep 2008 7:15 Re: Delay in a design |
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can u explain briefly about FIFO for delay?
Thanks
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cafukarfoo
Joined: 25 Jul 2007
Posts: 134
Helped: 3
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| 24 Sep 2008 11:18 Re: Delay in a design |
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| through counter or buffer ring
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hiral.kotak
Joined: 28 Aug 2008
Posts: 62
Helped: 7
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| 24 Sep 2008 11:28 Re: Delay in a design |
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Hi,
You can either include a no. of buffers or even numbers of inverters to create delay.
Thanks..
HAK..
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viju
Joined: 26 Nov 2006
Posts: 52
Helped: 8
Location: Bangalore
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| 24 Sep 2008 15:38 Delay in a design |
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| In many libraries delay cells are available. So no need to use discrete buffers or inverters. You can directly take instance of this cell as per your delay requirment.
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research_vlsi
Joined: 15 Nov 2006
Posts: 89
Helped: 3
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| 25 Sep 2008 10:04 Re: Delay in a design |
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| Thank you friends for your suggestions
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pmat
Joined: 26 Mar 2007
Posts: 42
Helped: 2
Location: Heraklion, Crete, Greece
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| 25 Sep 2008 11:42 Re: Delay in a design |
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Except from buffers and delay cells, you can use whatever mix of gates you want to create
delays... The only contstraint is that you have to use them in a way that they work in a monotonic way, i.e. during the evaluation of the delay every gate should only go once from 0->1 or from 1->0.
Cheers,
Pavlos
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realtek
Joined: 16 Mar 2004
Posts: 101
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| 28 Sep 2008 16:51 Delay in a design |
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using delay cell that provide by foundary
dont use inv for delay
bacause you cannot control the delay time
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hiral.kotak
Joined: 28 Aug 2008
Posts: 62
Helped: 7
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| 03 Oct 2008 13:35 Re: Delay in a design |
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HI,
If you have delay cells from the library, you can use them for the specified delay.
Thanks..
HAK..
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lsimeon
Joined: 01 Aug 2008
Posts: 43
Helped: 2
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| 09 Oct 2008 14:14 Delay in a design |
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| you can use RC circuit for a delay...
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