Nir Dahan
Joined: 19 May 2008
Posts: 74
Helped: 6
Location: Munich, Germany
|
 21 Sep 2008 12:04 Neg edge and pos edge DFF in the same clock tree |
|
|
|
|
this is usually done when using dual edge FF. the idea is to reduce the frequency by half and operate on both edges of the clock, thus using less power.
(for a short discussion on dual edge FF check here: http://asicdigitaldesign.wordpress.com/2007/07/31/the-double-edge-flip-flop/ )
the price you pay is a much more strict limitation on the clock tree synthesis since you have to account for 50% duty cycle. if you use both edges of the clock you want to have the SAME amount of time on both.
if you are anyways only using one edge of the clock, save the trouble and make your life easier.
ND.
http://asicdigitaldesign.wordpress.com/
|
|
