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Using D-latch for bus sharing

 
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Nora



Joined: 31 Mar 2006
Posts: 49


Post28 Aug 2008 19:45   Using D-latch for bus sharing

I need to use 8 IO pins from my CPU to control 16 outputs.
I'm thinking about using a 74__373 type chip to do this.
I've never used this type chip before so would appreciate any experienced knowledge...
Is this a good way to do what I need to do or are there any other suggestions?
Thanks in advance!
N_N
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gliss



Joined: 22 Apr 2005
Posts: 659
Helped: 61
Location: Boston Metro Area


Post28 Aug 2008 19:51   Re: Using D-latch for bus sharing

What CPU are you using? Does it have a byte high/byte enable IO pin or something?
This is not an ASIC design question, by the way.
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Nora



Joined: 31 Mar 2006
Posts: 49


Post28 Aug 2008 20:02   Re: Using D-latch for bus sharing

Sorry, where should I post this question then?
N_N
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gliss



Joined: 22 Apr 2005
Posts: 659
Helped: 61
Location: Boston Metro Area


Post28 Aug 2008 20:50   Re: Using D-latch for bus sharing

Depends on the type of processor. I would suggest either

http://www.edaboard.com/forum76.html

or

http://www.edaboard.com/forum7.html
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