bandgap start up

EDAboard.com Forum Index -> Analog Circuit Design -> bandgap start up

Author

Message

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 2:42 bandgap start up

hi

i attch the bandgap circuit. Do we need start up circuit for this bandgap and why?

thanks

Sorry, but you need login in to view this attachment

Last edited by surianova on 27 Aug 2008 14:58; edited 1 time in total

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 5:52 Re: bandgap start up

where is the attachment?

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 5:55 Re: bandgap start up

sorry , here the attachment

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 6:16 Re: bandgap start up

I still dont see any attachment... y not upload the file directly here only

standup

Joined: 25 Oct 2006
Posts: 32
Helped: 2

27 Aug 2008 7:11 Re: bandgap start up

upload your circuit,please
the start up circuits are very important for the self-bias circuits

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 14:59 Re: bandgap start up

sorry. just add the curcuit

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 15:35 Re: bandgap start up

Hi Surianova,

Yes in this circuit u very much need the startup circuit...
This circuit has two stable states one with zero current and other one with defined branch currents... and the second state is desired. So to pull it away from first state and pushe it into second one we need to inject some current into its branches and this is the purpose of startup.

hope this helps...

by the way simple way to start will be to connect a weak transistor to drain of one of the pmos and turn that tx on.

Last edited by ashish_chauhan on 27 Aug 2008 16:15; edited 1 time in total

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 16:04 Re: bandgap start up

ashish_chauhan wrote:

Hi Surianova,

Yes in this circuit u very much need the startup circuit...
This circuit has two stable states one with zero current and other one with defined branch currents... and the second state is desired. So to pull it away from first state and pushe it into second one we need to inject some current into its branches and this is the purpose of startup.

hope this helps... press helped button if it does.

by the way simple way to start will be to connect a weak transistor to drain of one of the pmos and turn that tx on.

thank you. But i use PMOS transistor as the input to the opamp, when both the input is zero, the opamp still on, how it can have start up problem? thx

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 16:15 Re: bandgap start up

do you have a seperate bias structure for ur opamp... if yes then probably u might be safe else not...

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 16:20 Re: bandgap start up

ashish_chauhan wrote:

do you have a seperate bias structure for ur opamp... if yes then probably u might be safe else not...

yes, the opamp has it own bias circuit. Do i still need start up circuit? Bcoz i ramp the VDD for 1ms or longer, the bandgap output still able to maintain at 1.2V

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 16:33 Re: bandgap start up

Pleaseeeeeeee!!! do not ramp vdd in this way u will never be able to test the need of start-up and even if u out one u wont be able to simulate its functionality.

first force the vdd as a DC voltage then enable the circuit. also put initial conditions which simply put off all the device in ur cirduit...

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

27 Aug 2008 16:39 Re: bandgap start up

ashish_chauhan wrote:

u mean put VDD as constant voltage? and initialize every node in the bandgap circuit to 0V?

i thought we only can test weather we need start up circuit when VDD ramping up?

thx

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

27 Aug 2008 17:13 Re: bandgap start up

well till some time back even i thought so ... but genrally at product level we force vdd then enable the circuit... so that may mess up..

in simulations ramping the vdd will always start ur circuit... in field its not so...

ytliang

Joined: 04 Aug 2008
Posts: 66
Helped: 5

29 Aug 2008 4:00 bandgap start up

To test if your startup circuit works, set your Vdd at a constant voltage, and your enable signal as a step function and see if your circuit works after it's enabled.

Also, you need a startup circuit regardless your input stage of the OP AMP is pmos or nmos. The bias current source (in your case a pmos I would guess) needs to be in the ON stage instead of the zero state. However, if your OP AMP is not self-biased and is biased from elsewhere, you should be fine imo.

ashish_chauhan

Joined: 02 Sep 2007
Posts: 262
Helped: 39

29 Aug 2008 14:59 Re: bandgap start up

thanx!! for repeating my last post in a elaborate manner... Neutral

jcchan

Joined: 28 Apr 2005
Posts: 33
Helped: 1

02 Sep 2008 15:25 Re: bandgap start up

thak you, it is very usefully to me.

Google
AdSense
Google Adsense

02 Sep 2008 15:25 Ads

surianova

Joined: 01 Sep 2004
Posts: 410
Helped: 21
Location: ASIA

03 Sep 2008 1:25 Re: bandgap start up

ytliang wrote:

thank you all for your reply. I have a question, what do you mean by enable signal as a step function ? how to set in simulation?

or is it something like, when enable is on, u get 1.2v and whenever enable is zero, u will get 0v?

benslama ahmed

Joined: 24 Jan 2008
Posts: 21
Helped: 4

17 Sep 2008 9:37 Re: bandgap start up

HI surianova;
Why did you have used an OpA Mounting in follower at the output of your BGR?

ytliang

Joined: 04 Aug 2008
Posts: 66
Helped: 5

17 Sep 2008 10:06 Re: bandgap start up

surianova wrote:

Sorry, I usually have an enable signal for my bandgap design that also acts as a startup trigger. To test if your startup circuit works, simply look at your bandgap output and see if it's correct.

The enable signal I was refering to is a step function. In other words, before time t, en = 0, and after time t, en = vdd. Here is a sample SPICE code using piecewise linear function in case you are interested.

ven en 0 pwl(0 0 20u 0 20.1u vdd)

saro_k_82

Joined: 17 May 2007
Posts: 266
Helped: 55
Location: India

21 Sep 2008 7:16 Re: bandgap start up

Hi Surianova,
I don't think this circuit can start-up by itself even if the amp is PMOS input and you have external bias current. The stable state is the state where the two currents are equal and the two amp voltages are equal. At zero current, there is no reason to believe that the amp will move itself out of the zero state when it is comfortable there (Unless ofcourse your amp implementation avoids output close to vcc..., It may still depend on the delay and slope of the external bias)
Test for start-up at low supply(constant), Slow, Cold after forcing all the transistor off by initial conditions and then try with small mismatch voltages in both directions. If it fails to start-up you may have more trouble with a PMOS input than with a NMOS input stage. You may have to do a stb analysis to find out the loop gain(as the amp is on, this will be more) and the start-up circuit must be able to overpower it in all cases. It's a big mess if the strong start-up circuit is not put to sleep properly (It affects noise, stability, PSRR and curvature).
I don't have too many good things to say about this architecture at 3.3V! Mismatch performance is poor, Stability at the working region is poorer than it is at zero-state,. Stability is furthur degraded by connecting the follower to R2 instead of R3.
Thanks,
Saro

endru

Joined: 10 Nov 2007
Posts: 21
Helped: 2

29 Sep 2008 11:09 Re: bandgap start up

Hi saro_k_82,

Can you explain further why:
- the mismatch performance is poor?
- stability at the working region is poorer than it is at zero-state?
- stability is further degraded by connecting the follower to R2 instead of R3?

Thanks in advance!

saro_k_82

Joined: 17 May 2007
Posts: 266
Helped: 55
Location: India

30 Sep 2008 11:38 Re: bandgap start up

1. This architecture is known to have poor mismatch performance when compared to other known high-supply text-book BGR architectures. I said it is not advisable at 3.3V supply. When the supply is only 1.2V and you are willing to spend a lot of area, it's blemishes are erased.
Small mismatches between the two PMOS can lend the circuit unstable(Unless you have a really huge device so that it's 3-sigma mismatch is taken care of). Refer to this topic too...http://www.edaboard.com/ftopic327779.html

2. Try computing the beta of the loop in the zero current state (The amp is PMOS and it is ON). As the diodes are off, beta is close to 1 (I have taken the PMOS also as part of the amp). It needs some small mismatches to be stable. But when it is stable, all nice properties of negative feedback., viz offset, CMRR, PSRR are going to be better than when it is working in the intended state. It takes a much bigger disturbance to make it come out of it's state there.

3. Any cap at R2 (either to VDD or GND) is going to rob the current that should have passed through R1. R1 is solely responsible for stability. In simple terms the negative feedback beta is reduced. But if you connect the amp to R3, the cap there will decrease positive feedback beta which enhances the stability.

Thanks,
Saro

xuedashun

Joined: 30 Aug 2005
Posts: 55
Helped: 1

01 Oct 2008 1:15 bandgap start up

i think the two amp input connections are wrong

standup

Joined: 25 Oct 2006
Posts: 32
Helped: 2

02 Oct 2008 12:19 Re: bandgap start up

I think the inputs of the amplifier are connected incorrectly,this is a positive feedback loop.

skung

Joined: 06 Nov 2008
Posts: 1

06 Nov 2008 22:21 Re: bandgap start up

xuedashun wrote:

i think the two amp input connections are wrong

Hi Xuedashun,
Could you explain why you think the two amp input connections are wrong?
I can see the main amp in the middle of the circuit is wrong. Can you also
help explain how the main one is wrong from your point of view?

Thanks.

siu