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Xilinx System generator and ASIC development

 
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electromaniac



Joined: 06 Oct 2007
Posts: 8
Helped: 2
Post26 Aug 2008 13:08   Xilinx System generator and ASIC development
Hi all

Does any one know the VHDL codes generated using the latest version (10.1) of

Xilinx system generator can be used in ASIC development or not

of cource they are optimized for Xilinx FPGA's

but what about ASIC

Can I use these codes safely

How is the quality of the generated codes

are they fully synthesizable by ASIC tools like Synopsys DC,....etc

If any one knows please reply

thanks
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salma ali bakr



Joined: 27 Jan 2006
Posts: 943
Helped: 79
Post28 Aug 2008 11:18   Re: Xilinx System generator and ASIC development
you can't use the code generated for ASIC, since it's only targeting Xilinx FPGAs...it's spaghetti code leveraging logic core codes Smile
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