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auromira
Joined: 18 Dec 2002
Posts: 23
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 06 Jan 2003 16:50 Xilinx Impact gives error when FPGA is configured Via JTAG |
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Hi, when i try to configure my spartan II FPGA via JTAG Xilinx Impact gives me the following error.
ERROR:. +iMPACT:583 - '1': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:629 - '1': Device IDCODE : 00001111111111111111111111111110
INFO:iMPACT:630 - '1': Expected IDCODE: 0000000001100001100000001001001
Somebody!!!!
Help me........ please.
Best regards,
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 06 Jan 2003 17:00 |
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Hello !
Did you set M0 and other pins to right mode?
Do you use serial slave, master... .... mode?
Did you set the device propertly in project properties?
One of the idea is, try to read device IDCode using Jtag.
Bart
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auromira
Joined: 18 Dec 2002
Posts: 23
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| 06 Jan 2003 17:11 |
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| Bartart wrote: |
Hello !
Did you set M0 and other pins to right mode?
YES ( MO-1 ,M1-0,M2-1)
Do you use serial slave, master... .... mode?
I use Boundray scan mode
Did you set the device propertly in project properties?
Yes
One of the idea is, try to read device IDCode using Jtag.
If i read the device IDcode it gives the same error
Bart |
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dingo
Joined: 10 Jul 2001
Posts: 43
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| 06 Jan 2003 17:27 |
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Why are you trying to use a .bsd file and not a .bit file ?
I had the same or very similar problem several times but the solution was
trivial (in fact I don't even remember wht I did).
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 06 Jan 2003 17:39 |
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Hmm....
I had the same error time ago, but I can't remeber what was wrong.
I will think about during night OK!
bart
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papyaki
Joined: 13 Apr 2002
Posts: 564
Helped: 19
Location: A small village somewhere in Gaul
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| 06 Jan 2003 18:18 |
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Hi
I had the same problem with a 95108 cpld. Seems to be an early mask revision of the chip.
Is your chip a brand new one with a recent mask revision ?
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KARLZ
Joined: 14 Apr 2001
Posts: 40
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| 06 Jan 2003 23:49 |
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well
it may be caused by one of the following reasons.
1- your spartanII device is an engineering sample (pre production sample)
2- it may use virtex bsdl file instead of spartanII
for more information you can check xilinx archive
regards
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auromira
Joined: 18 Dec 2002
Posts: 23
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| 07 Jan 2003 4:08 |
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Hi, impact Returns IDCODE different from the IDCODE In the BSDL file
Returned IDCODE :00001111111111111111111111111110
IDCODE in BSDL File:00000000011000011000000010010011
Could a faulty JTAG cable be a cause of this error .Impact correctly detects the JTAG Cable.
Somebody!!!!
Help me........ please.
Best regards
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 07 Jan 2003 8:02 |
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Hello !
After a night thinking about tjis problem, I had remember what was wrong.
I had a bad connection with FPGA board.
The Inpact did not show me any error when initialazing the chain, but when the programming started the error shows up.
P.S. I found this on xilinx site
http://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=13529
http://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=12709
Good luck bart
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mehrara
Joined: 28 Oct 2003
Posts: 14
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| 28 Oct 2003 11:55 |
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hi
I have the same problem with xilinx saprtan II (xc2s150).
I connect the cable directly to boundary scan pins in the device through a test board. should I pull-up or pull-down any of these pins? if not what may be the source of problem in my hardware
I had configured a Virtex II device with the same cable and it worked correctly . (but that device was on an Avnet development board)
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 28 Oct 2003 13:52 Re: Xilinx Impact gives error when FPGA is configured Via JT |
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Hi!
The ID error is also possible if you use ISE 5 or 4 for synthese and ISE 6 or 5 for downloading the bit stream. The problem is in the device bsd file.
Good luck!
Bart
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mehrara
Joined: 28 Oct 2003
Posts: 14
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| 28 Oct 2003 14:44 |
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hi
I use ISE 5.1i for both synthesis and downloading the bit stream.( I also installed the service pack but the problem persisted) and I use XST for synthesising.did you mean that I should download the new bsd files from Xilinx?
p.s: I used the same software for cofiguring the virtex II.
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 28 Oct 2003 15:05 |
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| mehrara wrote: |
hi
I use ISE 5.1i for both synthesis and downloading the bit stream.( I also installed the service pack but the problem persisted) and I use XST for synthesising.. |
:not: I don't have any idea, just try to debug your JTAG cable
or instead of bit file assain to impact the device bsd file, you will find it in
$:/xilinx/spartan2/data/
and try to get the device ID.
| mehrara wrote: |
| did you mean that I should download the new bsd files from Xilinx? |
No if you use the same sw for synthese and uploading there is no need to do that.
Bart
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dll_embed
Joined: 04 Sep 2003
Posts: 116
Helped: 1
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| 09 Nov 2003 8:16 Re: Xilinx Impact gives error when FPGA is configured Via JT |
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| Most likely your cable is too long. Check the signal quality. Last time i encountered this kind of problem, i just shortened the connection.
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mehrara
Joined: 28 Oct 2003
Posts: 14
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| 10 Nov 2003 7:42 |
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hi
the problem was due to my cable.
I used an old cable and it worked correctlly.
but I don`t know why I can not program Spartan II with a cable by which I have programmed Virtex-E!
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shawndaking
Joined: 20 Jun 2001
Posts: 235
Helped: 6
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| 10 Nov 2003 10:50 Re: Xilinx Impact gives error when FPGA is configured Via JT |
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i Found That In Cable IV The Rate Need To Be Reduced To Configure
VIRTEX Devices And PROMs !!!
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tpp
Joined: 17 May 2002
Posts: 19
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| 14 Nov 2003 10:20 |
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| I also encountered this error (before this error It's ok), I checked as you did up , but the reason is software ,after I reinstalled the ise ,It worked ok again!, try it .
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