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shakti_pattnaik
Joined: 28 Apr 2006
Posts: 4
Location: Bangalore
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 04 Aug 2008 4:56 Why Full Scan called combinational? |
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| Even if Full Scan logic has all the sequential elements why is it called combinational logic or how does it behave as a combinational logic?
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vlsi_eda_guy
Joined: 08 Feb 2008
Posts: 70
Helped: 7
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| 05 Aug 2008 19:21 Re: Why Full Scan called combinational? |
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hi Shakti,
Once your design is fully scanned, the flops on the scan chains act like virtual inputs and outputs. To access any part of the logic you can load the chains with scan enable high. Similarly any flops value can be taken out during the unload of the chain.
The data doesn't have to go from D pin to Q pin any more it is from SI to Q.
Let me know if you understood this, or else I can explain it in more details....
-cheers
Vlsi_eda_guy
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cheelgo
Joined: 23 Nov 2004
Posts: 82
Helped: 3
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| 05 Aug 2008 20:32 Why Full Scan called combinational? |
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| if not full scan, it will be called sequential ATPG.
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shakti_pattnaik
Joined: 28 Apr 2006
Posts: 4
Location: Bangalore
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| 06 Aug 2008 12:23 Why Full Scan called combinational? |
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Hi vlsi_eda_guy,
Thanks for the reply.
I could not get much from the reply. Could you please explain more. I mean which feature of the Full scan logic makes it behave as a combinational circuit.
Added after 2 minutes:
Why is it that for Combinational circuit we need less patterns as compared to sequential circuit?
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cheelgo
Joined: 23 Nov 2004
Posts: 82
Helped: 3
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| 06 Aug 2008 14:42 Why Full Scan called combinational? |
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Hi shakti_pattnaik, the ATPG engine for the full scan design target is the combinational logic faults generation. because the scan FFs test coverage is 100% and fully controlled. => it is called peseudo primary input, like virtual input!!!
so the ATPG only care about the combinational logic inside the chip. -> that's why it is called combination ATPG not sequential ATPG.
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santhosh007
Joined: 27 Aug 2008
Posts: 53
Helped: 14
Location: Bangalore
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| 28 Aug 2008 8:26 Re: Why Full Scan called combinational? |
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Hi shakti_pattnaik,
The idea is to control and observe the values in all the FF, so you can see the combinational logic between the FF's. the ATPG tool takes this combo logic into consideration and genrates combinational patterns, so no of patetrns are less.
Sequential ATPG,
Its a partial scan design where the between two scan FFs, there are non scan FF along with the combiational logic. So the ATPG tool has to generate a pattern with multiple clock pulses. so the pattern count and runtime is much more than a combinational ATPG.
I hope this answers your question.
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