Rules | Recent posts | topic RSS | Search | Register  | Log in

Electric VLSI design system by static

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design
Author Message
bbgil



Joined: 11 Mar 2006
Posts: 130
Helped: 4


Post24 Jul 2008 8:56   Electric VLSI design system by static

Hey guys. Anybody familiar with the ELECTRIC VLSI design system V 8.06? Its a free VLSI design system and simulator by static software. it uses VHDL and Verilog as well.

http://www.staticfreesoft.com/

My problem is with the built in simulator IRSIM and ALS. i'm testing a simple inverter in layout. It is simulating in ALS but not in IRSIM. I can see from the simulator window of IRSIM that the Vdd is not recogrnized but in ALS it is. Any ideas or links or tutorial will be appreciated. Thanx in advance
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design
Page 1 of 1 All times are GMT + 2 Hours


Abuse
Administrator
Moderators
topic RSS 
sitemap