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inductance and capcitor???

 
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khamitkar.ravikant



Joined: 15 Jul 2008
Posts: 191
Helped: 113
Location: India


Post23 Jul 2008 11:52   inductance and capcitor???

hi all can any body explain me how i can implement an anolog component in VHDL programing lang. please explain any alternative and flow to be followed as i need capacito in PLL design and also inductor in corresponding circuit with the values as capacitor of .20 uf and inductor of 3mH.


thanks in advance plesase help:?:
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khamitkar.ravikant



Joined: 15 Jul 2008
Posts: 191
Helped: 113
Location: India


Post24 Jul 2008 7:20   inductance and capcitor???

please there is no one who can help me in this regard so is ther lack of basic thing here i want to know
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Davood Amerion



Joined: 01 Mar 2005
Posts: 588
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Location: Persia


Post24 Jul 2008 14:23   inductance and capcitor???

Hi
As I know VHDL can not model analog devive such as inductor and capacitor nor resistor and transistor.
VHDL designed to model logic circuit and its signal delays.
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khamitkar.ravikant



Joined: 15 Jul 2008
Posts: 191
Helped: 113
Location: India


Post28 Jul 2008 10:21   inductance and capcitor???

so there is no way to implement anlog circuit using VHDL is this right or there is any other alternative for implementation of the anlog devices in VLSI please let me know.
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FvM



Joined: 22 Jan 2008
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Location: Bochum, Germany


Post28 Jul 2008 10:28   Re: inductance and capcitor???

Analog components can be usually simulated with sufficient accuracy by approximating the differential equations with difference equations, using a constant time step.
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Davood Amerion



Joined: 01 Mar 2005
Posts: 588
Helped: 90
Location: Persia


Post28 Jul 2008 10:45   inductance and capcitor???

I dont work on it. I asked this question from my friend, he said you can use VHDL-AMS (VHDL- Analog and Mixed signal Extension).
http://en.wikipedia.org/wiki/VHDL-AMS
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