Rules | Recent posts | topic RSS | Search | Register  | Log in

VHDL code for serial in serial out

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design
Author Message
j hemangini



Joined: 21 Jul 2008
Posts: 35


Post22 Jul 2008 10:08   VHDL code for serial in serial out

I am using spartan-3a starter kit. I want to write VHDL code for serial in serial out . If someone have code for this then please post it.
Thank you.
Back to top
sree205



Joined: 13 Mar 2006
Posts: 411
Helped: 30


Post22 Jul 2008 10:17   VHDL code for serial in serial out

library ieee;
use ieee.std_logic_1164.all;

entity SISO is
port (clk : in std_logic;
rst : in std_logic;
s_in : in std_logic;
s_out : out std_logic);
end SISO;

architecture s1 of SISO is
begin
process(clk,rst,sin)
begin
if(rst='0') then
sout <= 1'b0;
elsif(clk='1' and clk'event) then
sout <= sin;
end if;
end process;
end s1;
Back to top
mehrzad321



Joined: 14 Feb 2008
Posts: 5


Post22 Jul 2008 11:54   VHDL code for serial in serial out

Hi,
Can you clearify your need? what kind of process you want to be done on input data? do you really want to just give serial data from one hand and put it outside with another hand? both input and outout are serial?
Back to top
j hemangini



Joined: 21 Jul 2008
Posts: 35


Post24 Jul 2008 12:07   Re: VHDL code for serial in serial out

Actually I want to communicate my spartan-3a starter kit with hyperterminal and want to display on LCD ,what i write on hyperterminal. I got a vhdl code on website www.OPENCORES.org . But now i am unable to find all the pinouts defined in that code. I know only pinouts for RxD & TxD. If someone can help me then please post your views.
Thank you.
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design
Page 1 of 1 All times are GMT + 2 Hours


Abuse
Administrator
Moderators
topic RSS 
sitemap