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PMOS with High Turn On Voltage

 
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joyce2002



Joined: 07 Jul 2008
Posts: 7


Post07 Jul 2008 12:41   PMOS with High Turn On Voltage

Hi guys,

I encountered one bad PMOS which requires 1.2V (Threshold Voltage) to turn on compared to a good PMOS which only requires 0.7V (Threshold Voltage) to turn on, in one of my failure analysis on a FPGA device. This FPGA device is failing MRAM High Speed Test at 25C and 0C but passing the MRAM test at 85C.

I would like to find out what is the root cause which can cause the PMOS to turn on at a higher Vt compared to a normal good PMOS. I could think of 2 root cause so far.

1. Could it due to the length of the channel between Drain and source? When the length of the channel increases, the resistance also increases, thus, more voltage is needed to drive electrons from drain to source? Eventually the Vt is higher in order for the transistor to turn on.

2. Doping of the drain and source which increrases the resistance in the channel (btw drain and source) that leads to higher Vt needed to drive current through from Drain to Source.

Any idea guys?



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refugee



Joined: 02 Nov 2006
Posts: 19


Post07 Jul 2008 16:10   Re: PMOS with High Turn On Voltage

There are several reasons here:
1.The dopant concentration of the p- bulk: with the light dopant, we need less voltage to repel the carrier away from the interface.
2.The backgate voltage: ask it for body effect
3.the gate insulator: Different material used as the insulated layer
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joyce2002



Joined: 07 Jul 2008
Posts: 7


Post09 Jul 2008 3:25   Re: PMOS with High Turn On Voltage

Hi,

I would like more details on item1.
Are you saying that,

1. Light-doped N-substrate is desirable for optimum device behaviour in MOS device.
2. High-doped N-susbtrate is usually undesirable but it is required to overcome short channel effects which can help to reduce the channel length.
3. Increases in substrate dopant concentration, however give rise to larger junction capacitances, lower junction breakdown voltages, and lower carrier mobilities, making such increases in substrate dopant concentration undesirable.
Higher doping of sustrate increases the channel length which also makes the drive current weaker, which eventually causes higher Voltage needed to turn on the PMOS?
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