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Manual Place and route
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sandeep_sggs



Joined: 21 Jan 2008
Posts: 120
Helped: 3
Post20 Jun 2008 11:16   

Manual Place and route
Dear all,
Can anybody tell me what is the significance of Manual "place and route" in Xilinx tools ( i Use xilinx9.1) and how to do it in DETAIL! Is manual process really useful considering the Good place and route algorithms embedded in vendor`s tools. i may be wrong, so please rectify me if so is the case!
Any good document for this subject is welcome. plz make it as early as possible..
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gliss



Joined: 22 Apr 2005
Posts: 670
Helped: 61
Location: Boston
Post20 Jun 2008 15:21   

Manual Place and route
This is the ASIC forum, I think this question would be better put in the FPGA forum.
But generally speaking, any design of signifigant size you're going to want to use the automatic place and route. Maybe only use manual place for a few instances on critical paths or for DRC violations.
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Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital) -> Manual Place and route
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