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What's the difference among Modelsim PE, SE, LE and XE tools
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vishwa



Joined: 11 Aug 2005
Posts: 156
Helped: 12
Location: India
Post03 Jun 2008 11:16   

modelsim student edition difference
Hi,


Can anybody please let me know, What's the difference among Modelsim PE, SE, LE and XE tools.

To simulate VHDL/Verilog code for FPGAs, which software i have to download??


Regards,
Viswa
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echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566
Post03 Jun 2008 12:01   

modelsim pe vs xe
This may help you:
http://www.xilinx.com/support/answers/8078.htm

I don't think you want LE. It doesn't support VHDL.
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vishwa



Joined: 11 Aug 2005
Posts: 156
Helped: 12
Location: India
Post03 Jun 2008 14:56   

modelsim pe se le
Hi,


Thanks for the reply.

Modelsim PE Student version is available for free on web. Is this enough to simulate FPGAs for functional & timing verification?


Regards,
Vishwa
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echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566
Post04 Jun 2008 5:14   

modelsim pe se difference
That sounds like a good choice. The main thing you don't get is support.

That version may not support both VHDL and Verilog simultaneously in the same simulation. If that's important to you, investigate further.
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boardlanguage



Joined: 06 Apr 2007
Posts: 96
Helped: 4
Post07 Jun 2008 17:08   

modelsim le
vishwa wrote:
Hi,


Thanks for the reply.

Modelsim PE Student version is available for free on web. Is this enough to simulate FPGAs for functional & timing verification?


Regards,
Vishwa


No -- the Student version can't the vendor cell-libraries. (You need these for gate-level simulations, or if your RTL directly instantiates any vendor IP-blocks, like the DSP48, BlockRAM, transceiver, etc.)

The XE edition (free-one) comes with Xilinx's libraries precompiled. I'd start there.

And like someone else said, none of the free Modelsim editions (OEM or Mentor) allow mixed-language (VHDL+Verilog) simulation. I also noticed Systemverilog support has been disabled since last year. (Before that, you could compile and run limited Systemverilog simulations, if you limited yourself to 'Design' constructs only.)
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