| Author |
Message |
anishjp
Joined: 04 Jan 2008
Posts: 56
Helped: 1
Location: "Gods own country".. Kerala
|
 13 May 2008 9:55 Upsizing of Cell |
|
|
|
Hi all,
What is meant by upsizing of cell......?
|
|
| Back to top |
|
 |
AdvaRes
Joined: 14 Feb 2008
Posts: 623
Helped: 33
|
| 13 May 2008 10:14 Re: Upsizing of Cell |
|
|
|
| anishjp wrote: |
Hi all,
What is meant by upsizing of cell......? |
Do you mean Transistor sizing ?
|
|
| Back to top |
|
|
vlsitechnology
Joined: 01 Nov 2007
Posts: 236
Helped: 6
|
| 14 May 2008 8:22 Upsizing of Cell |
|
|
|
| Upsizing means increasing the width of the transistor that is increasing the width of the diffusion...This helps us to solve setup and hold violation in timing analysis...Bcz upsizing reduces the delay of the std cell...Hope it is clear for u
|
|
| Back to top |
|
|
edagops
Joined: 04 May 2008
Posts: 10
|
| 14 May 2008 12:33 Re: Upsizing of Cell |
|
|
|
Upsizing of cell leads to decrease in cell delay with impact on increase in area, this will fix setup violation..
Since delay of the cell decreased hold margin will reduce.
If hold met barely prior to upsize , then hold may violate after upsizing..
|
|
| Back to top |
|
|
