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Layer Fundamentals

 
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ebs57



Joined: 29 Apr 2008
Posts: 1
Post29 Apr 2008 22:02   Layer Fundamentals
Can one or more experts please briefly describe the general layer stack for decals?

I am working in/fighting with PAD$ 2005 SP2 and I've constructed several basic shapes that have a top copper. Many times this non-electrical shape is converted to silk because its on a surface layer but sometimes I've created a polygon in the silkscreen layer and left the topside/bottomside layers purely electrical.

I would be very interested in what is "standard" for the US market: Do all top non-electrical shapes get converted to silkscreen or is it more "professional" to make a discreet silkscreen layer and overlay your electrical layers?

Any advice is welcome.

Thanks,

- Wang
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v_kumar



Joined: 02 Jun 2004
Posts: 216
Helped: 11
Post30 Apr 2008 10:34   Layer Fundamentals
i think you are talking about footprint creation in PADS..

i have earlier used pads and following are the things you should provide while creating a footprint.

example 8 pin soic
1) pads must be placed on top electrical
2) silkscreen will be drawn on SST ( silkscreen top layer)
3) Assembly must be drawn on AST (Assembly top layer)
4) Reference designator labels on top and assembly layer must be placed.

these are the basic steps to be done while creating the footprint.
its upto you who has to decide what should be present on which layer.
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