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firsttimedesigning
Joined: 04 Jul 2007
Posts: 96
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 01 Apr 2008 12:06 Capacitor Mismatch |
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I have been trying find some information on what cause capacitor mismatch,
so far the only thing that I know is that there is a random edge variation. Other possible causes such as undercut, long range gradients. They all can be eliminated using common centroid geometry. What I would like to know though is that how much effect does random edge variation on the capacitor ratio? And why do people say it is easier to match two big capacitors rather than two small capacitors? Is it because the random edge variation depends on the size of the capacitor. The random edge variation probably differs from technology to technology. But can anyone give me a general value? like an average value or something.
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raj_shekar
Joined: 27 Feb 2008
Posts: 11
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| 02 Apr 2008 7:20 Re: Capacitor Mismatch |
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Statistically Random error in capacitor ratio has been observed to be depends on inverse square root depends on the capacitor-area. and linear dependance on permiter-to-area ratio.
These are the common rules to be followed to get better matching:
Use identical geometries
- Different sizes of capacitors match poorly
Use square geometries for precisely matched capacitors
- Peripheral variations are major source of random mismatch
- Lowest periphery to area ratio
Make capacitors as large as possible
- Optimum size between 20 x 20 to 50 x 50 um
Place matched capacitors adjacent to one another
- Large number of capacitors should be placed into rectangular arrays
Place dummy capacitors around outer edge of array
- Dummy capacitors will shield matched capacitors from lateral electrostatic
fields and eliminate variations in etchrates
Electrostatic shield matched capacitors
- Contains fringing fields
- Allows leads to go over capacitors
- Shields capacitors for electrostatic fields
- Reduces effects of packaging stress
Cross couple arrayed capacitors
- Minimizes the effects of oxide gradients
Consider capacitance of leads
- Leads will contribute to capacitance
Avoid running leads over unshielded capacitors
Look at the attachment for better statistical data.
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smilelangjun
Joined: 07 Sep 2005
Posts: 37
Helped: 1
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| 03 Apr 2008 18:14 Capacitor Mismatch |
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I think that give a very convincing answer.
You can read a book which describe the question
very carefully,named the Art of Layout.
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mpig09
Joined: 26 Aug 2005
Posts: 108
Helped: 5
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| 04 Apr 2008 6:55 Re: Capacitor Mismatch |
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Dear raj_shekar:
There are some items that I don't understand,
could you discuss more detail?
- What's mean "Contains fringing fields"?
- Allows leads to go over capacitors
What is "lead"?
- Reduces effects of packaging stress
Why packaging stress will effect cap mismatch?
mpig
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firsttimedesigning
Joined: 04 Jul 2007
Posts: 96
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| 08 Apr 2008 2:42 Re: Capacitor Mismatch |
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Raj, thank you for the reply.
However, the answer that I am looking for is not the causes of the mismatch but rather the value of the mismatch. For example, small capacitors are hard to match with each other. Let C be the unit capacitance and say I want a ratio 1:1 between two capacitors. It is harder to match a 1C capacitor with another 1C capacitor than to match a 128C capacitor with another 128C capacitor. The ratio of 1C and 1C capacitors might have 0.1% error. But the ratio of 128C and 128C capacitors will have 0.01% error. That percentage is what I want to know. I know it depends on the technology that you are using, but I would like to know a value.
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layoutmaster
Joined: 18 Mar 2008
Posts: 182
Helped: 27
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| 09 Apr 2008 21:20 Capacitor Mismatch |
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Book: The Art of Analog Layout
Author: Alan Hastings
Chapter: 7 - Matching of Resistors and Capacitors.
There you'll find a very interesting description on caps mismatching and a calculation of the mismatch coefficient of capacitance...
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firsttimedesigning
Joined: 04 Jul 2007
Posts: 96
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| 11 Apr 2008 2:19 Re: Capacitor Mismatch |
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Thank you for the replying...
Does anyone know what is the unit capacitance of a 12 bit successive approximation ADC?
Are the capacitors that people use in a 12 bit SA-ADC the same as
the ones they use in pipeline ADC?
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layoutmaster
Joined: 18 Mar 2008
Posts: 182
Helped: 27
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| 11 Apr 2008 18:43 Capacitor Mismatch |
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| I do not see why not...
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pixel
Joined: 16 Sep 2004
Posts: 535
Helped: 52
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| 16 Apr 2008 0:12 Re: Capacitor Mismatch |
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| Capacitor mismatch dC/C is generally proportional to 1/√Area
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raj_shekar
Joined: 27 Feb 2008
Posts: 11
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| 17 Apr 2008 7:45 Re: Capacitor Mismatch |
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| It is very difficult to quote the values, it depends completely on the layout/technology. One has to extract the layout and check the cap value and reiterate.
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somo
Joined: 02 Feb 2006
Posts: 9
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| 19 Apr 2008 8:33 Re: Capacitor Mismatch |
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| firsttimedesigning wrote: |
Thank you for the replying...
Does anyone know what is the unit capacitance of a 12 bit successive approximation ADC?
Are the capacitors that people use in a 12 bit SA-ADC the same as
the ones they use in pipeline ADC? |
Yes good question, i wanna know the answer too. Do the capacitors used in SAR ADC also suit for pipeline ADC for the same technology
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yezeg
Joined: 12 Jan 2006
Posts: 15
Helped: 1
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| 26 Apr 2008 14:54 Capacitor Mismatch |
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The ratio of 1C and 1C capacitors might have 0.1% error. But the ratio of 128C and 128C capacitors will have 0.01% error.
is it suit for the normal cmos technolygy?
Added after 9 minutes:
The SAR ADC is different from the Pipline ADC ,So the way for choosing the unit capcitor is not the same.
For a 0.6um technology ,a 40um*40um unit capacitor ,the relative mismach is 0.08%.
For a 12 bit ADC , deltaC/C less then 1/2^N .so u can choose the unit capacitor.
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raj_shekar
Joined: 27 Feb 2008
Posts: 11
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| 02 May 2008 16:48 Re: Capacitor Mismatch |
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| ΔC/C ratio has to be LSB/2 accurate. so one has to cross check the extracted cap to achieve the accuracy.
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winsonpku
Joined: 07 Jul 2005
Posts: 104
Helped: 6
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| 04 May 2008 12:53 Re: Capacitor Mismatch |
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Very good reply!
| raj_shekar wrote: |
Statistically Random error in capacitor ratio has been observed to be depends on inverse square root depends on the capacitor-area. and linear dependance on permiter-to-area ratio.
These are the common rules to be followed to get better matching:
Use identical geometries
- Different sizes of capacitors match poorly
Use square geometries for precisely matched capacitors
- Peripheral variations are major source of random mismatch
- Lowest periphery to area ratio
Make capacitors as large as possible
- Optimum size between 20 x 20 to 50 x 50 um
Place matched capacitors adjacent to one another
- Large number of capacitors should be placed into rectangular arrays
Place dummy capacitors around outer edge of array
- Dummy capacitors will shield matched capacitors from lateral electrostatic
fields and eliminate variations in etchrates
Electrostatic shield matched capacitors
- Contains fringing fields
- Allows leads to go over capacitors
- Shields capacitors for electrostatic fields
- Reduces effects of packaging stress
Cross couple arrayed capacitors
- Minimizes the effects of oxide gradients
Consider capacitance of leads
- Leads will contribute to capacitance
Avoid running leads over unshielded capacitors
Look at the attachment for better statistical data. |
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forkschgrad
Joined: 06 Apr 2007
Posts: 281
Helped: 8
Location: Philippines
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| 05 May 2008 19:24 Re: Capacitor Mismatch |
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| if you're asking for the computation, i guess a physicist might answer the question. i had research before and they use different algorithms to find out capacitor mismatch. even hastings did not discussed thoroughly the computations regarding that matter. he just gave the overview.
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northeast1
Joined: 21 Jun 2007
Posts: 145
Helped: 4
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| 09 May 2008 4:04 Re: Capacitor Mismatch |
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| firsttimedesigning wrote: |
I have been trying find some information on what cause capacitor mismatch,
so far the only thing that I know is that there is a random edge variation. Other possible causes such as undercut, long range gradients. They all can be eliminated using common centroid geometry. What I would like to know though is that how much effect does random edge variation on the capacitor ratio? And why do people say it is easier to match two big capacitors rather than two small capacitors? Is it because the random edge variation depends on the size of the capacitor. The random edge variation probably differs from technology to technology. But can anyone give me a general value? like an average value or something. |
So far, the TSMC and UMC foundrys can let the cap mismatch below 0.1%.
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rillyxue
Joined: 03 Jan 2007
Posts: 25
Helped: 1
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| 14 May 2008 4:00 Re: Capacitor Mismatch |
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| you can find a report in foundry's website about capacitor mismatch. and from this data, you can decided your capacitor used in your design.
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