Rules | Recent posts | topic RSS | Search | Register  | Log in

how to see assertion signal in waveform using verdi?

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Author Message
quan228228



Joined: 23 Mar 2006
Posts: 214
Helped: 13


Post18 Mar 2008 8:14   how to see assertion signal in waveform using verdi?

In my design, we use assertion method to check design.
when i complete the simulation, dump the fsdb file, then want to see the assertion signal using verdi waveform, eventually i cant drag and drop the assertion signal to waveform. Why ?

Is there something to be set for verdi or NC before simulation?

Thanks and urgent.

David
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap