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faye_hongdou
Joined: 21 Nov 2003
Posts: 34
Helped: 1
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 07 Mar 2008 4:43 Question for ATE testing |
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I'm going to generate the test pattern for ATE machine. There are several anlog module in the chip, such as pll, phy, etc. Any one could tell me how could I generate the pattern for the analog part used on ATE?
Thx
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sparso
Joined: 30 Dec 2006
Posts: 63
Helped: 1
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| 07 Mar 2008 6:13 Question for ATE testing |
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Do you have analog BIST? Normally scan patterns
do not cover analog modules.
Added after 2 minutes:
You can set the modules in certain mode through
JTAG or SPI or which ever is available to you and then
you can run functional patterns are use stress methods
like voltage margining to test these ckts. For PLLs
you have to have a way to output the freq. and then measure it to test the PLL.
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dft_guy
Joined: 19 Oct 2006
Posts: 109
Helped: 14
Location: USA
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| 09 Mar 2008 0:50 Re: Question for ATE testing |
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Normally, digital and analog testing are separate tests on the ATE. If you are responsible for generating ATE patterns, that's normally for the digital portion, and you would treat the analog portion as a block box. If the circuit has been design correctly, whatever happens in the analog part will not affect the digital pattern.
However, some devices have not been designed this way, and aconsequently it may be difficult to generate stable patterns for the ATE
John for DFT talk/info go to:
DFT Digest
DFT Forum
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ls000rhb
Joined: 17 Jun 2005
Posts: 204
Helped: 6
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| 10 Mar 2008 10:30 Question for ATE testing |
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separate digital and analog parts test on ATE.
In patterns, stop point can be inserted for analogy part measure. that is to say, when running to a stop point, ATE stops and analog parts can be tested, if completed the analog part test, ATE can continue to run the left patterns. I don't know this way is right or wrong. please more specialists give better advices.
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swimming.pig
Joined: 10 Mar 2008
Posts: 5
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| 10 Mar 2008 10:34 Question for ATE testing |
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For .18 or .13 technology, you can adopts IDDQ testing method to cover analog component.
Chiou
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faye_hongdou
Joined: 21 Nov 2003
Posts: 34
Helped: 1
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| 17 Mar 2008 10:36 Re: Question for ATE testing |
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I know that the digital and analog testing are two seperate parts. There is not much problem on testing for digital part. While I don't know how to do the testing for analog part.
Is running functional pattern the write way for analog testing? If there is a analog part that could not be tested by funtional pattern, how can I test this analog part.
thx
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kiranks9
Joined: 21 Feb 2008
Posts: 44
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| 17 Mar 2008 12:26 Re: Question for ATE testing |
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hi
We have PMT mode(Parallel Mode testing), generate the patterns for analog blocks like PLL, etc when u r in PMT mode.
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dft_guy
Joined: 19 Oct 2006
Posts: 109
Helped: 14
Location: USA
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| 17 Mar 2008 17:00 Re: Question for ATE testing |
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Analog testing is highly dependent upon the circuits implemented. PLL testing is completely different than amplifier or filter testing, for example. The only generalization I could make is that DFT-wise, you must maximize the access to what you want to test - you must be able to control and observe as much as possible. This may mean adding secondary control points and observation points, if possible
John
for DFT talk/info go to:
DFT Digest
DFT Forum
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