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abort
Joined: 04 Mar 2008
Posts: 2
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 04 Mar 2008 10:25 Xilinx FFT ipcore with ADC question |
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I have audio data coming out of an ADC.
I wanted to use a Xilinx FPGA to run it through a FFT and I noticed that Xilinx has a FFT ipcore available in their CORE Generator that I believe I can use. The input requires a real part and an imaginary part, but I only have the real part [the data coming off the ADC].
I read "Distributed Half Band Filter (DHBF) provides an efficient mechanism for converting a digitised signal from an ADC into a complex representation for input to the FFT transform." and "The ADC output is first applied to a DHBF (Distributed Halfband Filter), which converts the real input signal to a complex output at half the rate."
So my question is does Xilinx also provide a DHBF ipcore through CORE Generator or how would I otherwise go about getting a DHBF to put between the ADC and the FFT?
Thank you very much.
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muralicrl
Joined: 06 Feb 2008
Posts: 281
Helped: 30
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| 05 Mar 2008 11:28 Re: Xilinx FFT ipcore with ADC question |
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Hi Friend,
You can apply Hilbert transform to the output of ADC, so that you will get both I and Q samples which can be directly given to FFT core which requires both I and Q samples.
For more details kindly contact me.
regards,
N.Muralidhara
MSRS, CRL-BEL
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abort
Joined: 04 Mar 2008
Posts: 2
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| 06 Mar 2008 8:28 Re: Xilinx FFT ipcore with ADC question |
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I appreciate your response about the Hilbert Transform!
When I select that in the Xilinx CORE generator and build it, it gives me the I and Q parts, as you mentioned, the I part is 16 bits [the length of the input], but the Q part is 35 bits. I'm not sure why. It seems, however, that I am able to adjust the output width of Q somewhat based on what I used for the Coefficient Width when creating the Hilbert Transform [down to a minimum of 21 bits]. The Q width is always at least 5 bits wider than the I width.
I did find this in the Xilinx documentation as to why the I and Q outputs are of different size:
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| Filter input data is supplied on the DIN port (N bits wide) and filter output samples are presented on the DOUT port (R bits wide). The output width R is the sum of the data bit width N, the coefficient bit width K, and the bit growth due to the number of coefficients. ... For Hilbert transform filter implementations, a pair of In-Phase/Quadrature data outputs is provided. The In-Phase data output is N bits wide, as it is a delayed version of the input data, while the Quadrature data output is R bits wide, calculated as described previously. |
But the FFT that I created in CORE generator is expecting the I and Q parts to be 16 bits wide each.
What am I missing? Thank you very much!
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chris_xieq
Joined: 08 May 2008
Posts: 4
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| 12 May 2008 11:00 Re: Xilinx FFT ipcore with ADC question |
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Hi Abort,
Have you ever sove the problems, I meen the problem too, audio comes from ADC, I need to analyzer the THD/Spectrum through FFT, I want to use Xilinx's Core too.
Hi muralicrl,
As mentioned above, could you kindly give me some advise please? Thanks.
Regares,
Chris.
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