clock synthesizer

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nareshgtr

Joined: 17 Feb 2007
Posts: 48
Helped: 2
Location: Bangalore

19 Feb 2008 5:32 clock synthesizer

i am working as front end designer. in my design i need to design clock synthesizer which takes 100 MHZ clock as input. The output clock should be in between 1KHz to 20 Mhz. can any suggest good documents or any algorithm for this synthesizer.

mvs sarma

Joined: 23 Apr 2006
Posts: 381
Helped: 36
Location: Hyderabad, India.

19 Feb 2008 6:31 clock synthesizer

Please see the Analog Devices AD9850 and AD9851.
They have all application notes and detailed info . It serves your needs comfortably and it is a state of art device as of now.

all the best

Sarma

nareshgtr

Joined: 17 Feb 2007
Posts: 48
Helped: 2
Location: Bangalore

19 Feb 2008 6:38 Re: clock synthesizer

thanks for apply... i want implement in FPGA. i have write the code in vhdl for fpga for that synthesizer i want implement synthesizer in fpga please give synthesizable code for this

FvM

Joined: 22 Jan 2008
Posts: 5154
Helped: 766
Location: Bochum, Germany

19 Feb 2008 9:24 Re: clock synthesizer

Hello,

for a clock synthesizer with spectral pure output (as usually expected), you need a PLL and an analog phase comparator, that are analog parts. The FPGA can only provide programmable frequency dividers for the synthesizer, which isn't difficult. A digital "synthesizer" would imply fractional division and clock jitter at output, cause output signal transition can only occur at 100 MHz clock events.

Regards,
Frank