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alam.tauqueer
Joined: 19 Jun 2007
Posts: 132
Helped: 3
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 31 Jan 2008 14:04 Blocking and Non-Blocking assignment |
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Hi,
Can any one tell me what is the difference between the below mention code ,and what would be the issues if we are using blocking statment in sequencial logic
//////////////////////////////////////
always@(posedge clk)
begin
if(reset)
begin
q1 = 0;
q2 = 0;
end
else
begin
q1 = d1;
q2 = d2;
end
end
/////////////////////////////////
always@(posedge clk)
begin
if(reset)
begin
q1 <= 0;
q2 <= 0;
end
else
begin
q1 <= d1;
q2 <= d2;
end
end
///////////////////////////////////
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FvM
Joined: 22 Jan 2008
Posts: 2315
Helped: 385
Location: Bochum, Germany
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| 31 Jan 2008 15:05 Re: Blocking and Non-Blocking assignment |
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Hello,
1. there is no difference in this case,
2. behaviour would be different, if a assigned register value is used in another assignment effective on posedge clk
3. I don't see a particular issue, apart from function not behaving as intended. Both assignment techniques could be meaningful.
An an implication of blocking assignment, logic function could depend on statement order, cause you can have mutiple assignments to a register in a sequence, each taking effect immediately. With non-blocking assignment, function is independant of statement order, cause any assignment takes effect in the next clock cycle.
Regards,
Frank
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NanhTrang
Joined: 13 Aug 2006
Posts: 18
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| 31 Jan 2008 18:06 Blocking and Non-Blocking assignment |
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Hi,
Correct me if I'm wrong.
There's some guideline that we should follow:
1. When modeling sequential logic, use nonblocking assignments.
2. When modeling combinational logic with an always block, use blocking assignments.
These can help you avoid all the mismatch between simulation and synthesis.
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FvM
Joined: 22 Jan 2008
Posts: 2315
Helped: 385
Location: Bochum, Germany
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| 31 Jan 2008 22:13 Re: Blocking and Non-Blocking assignment |
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Hello,
I'm not sure in which situation you get "mismatch between simulation and synthesis". I think, a mismatch between programmers intention and the function actually coded is the more common case. You should know what you are doing.
Your differentiation between sequential logic and combinational always blocks generally leads in the right direction. However, when describing synthesisable logic, the term "sequential" should be better replaced or supplemented by the term "synchronous", which characterizes the functional quality. Any assignment in the context of an "synchronous" always clock (posedge, negedge) instantiates a clock synchronous flipflop, which effectively operates non-blocking.
If you use blocking statements in this context, this could have different meanings. As in your original example, it could have no particular meaning and then would be inadequate, possibly misleading. Or it could instantiate additional combinational logic executing before non-blocking assignments. In VHDL, you have to use a separate VARIABLE object instead of a SIGNAL (= reg) to achieve this functionality.
In a combinational always block, non-blocking assignments don't have a reasonable purpose to my opinion.
As a detailed Verilog description, I prefer the Synopsys HDL compiler reference manual (identical in parts with the Xilinx Foundation Express verilog reference) http://www.stanford.edu/class/ee108b/labs/verilog_reference.pdf
Regards,
Frank
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NanhTrang
Joined: 13 Aug 2006
Posts: 18
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| 01 Feb 2008 4:37 Blocking and Non-Blocking assignment |
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Well have a look at this. It's got a good explanation what we should use in each case.
http://csg.csail.mit.edu/6.375/papers/cummings-nonblocking-snug99.pdf
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alam.tauqueer
Joined: 19 Jun 2007
Posts: 132
Helped: 3
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| 01 Feb 2008 7:24 Blocking and Non-Blocking assignment |
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Hi Frank,
I am fully agree with you but I was confuse like if we are using a blocking assignment in case of sequential always block as the example given above than how it is different from a non-blocking assignment.
I have one more question here is there any simulation synthesis mismatch in case of blocking assignment?
And what would be the harware ? It will be same hardware which we ll get through non-blocking assignment?
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santumevce1412
Joined: 08 Jan 2008
Posts: 14
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| 01 Feb 2008 11:32 Re: Blocking and Non-Blocking assignment |
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| For designing the sequential circuits, we define using non blocking statements because all the events r to be changed at the edge of the clock and for designing combinational circuits, we use blocking statements, as clk event is not a criteria..
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FvM
Joined: 22 Jan 2008
Posts: 2315
Helped: 385
Location: Bochum, Germany
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| 01 Feb 2008 12:07 Re: Blocking and Non-Blocking assignment |
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Hello,
thank you for linking the SNUG paper. It is really instructive and probably answers most questions raised in this discussion, also regarding possible mismatches between synthesis and simulation. It effectively could end the discussion.
I have a minor differences regarding the mixed cases (Guideline #5) in synchronous always blocks, which can be meaningful in some cases to my opinion. But I share the authors viewpoint, that alternative constructs better avoid misunderstandings. In so far I also agree Guideline #5, others anyway.
Regards,
Frank
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vamsi_addagada
Joined: 05 Jul 2007
Posts: 90
Helped: 3
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| 01 Feb 2008 13:11 Blocking and Non-Blocking assignment |
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hi ajay
the systhesis out put is first code got one FF that is connect the d1,d2,
second code getting the o/p is the 2FF
vamsi
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alam.tauqueer
Joined: 19 Jun 2007
Posts: 132
Helped: 3
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| 04 Feb 2008 7:34 Blocking and Non-Blocking assignment |
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Ok so in the above code we will not see any difference between blocking and non-blocking assignment.
Can any one please tell me where would be difference come into picture if we will use blocking assignment in case of sequential circuit.
It wil help us to get a better understanding.
Tauqueer
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FvM
Joined: 22 Jan 2008
Posts: 2315
Helped: 385
Location: Bochum, Germany
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| 04 Feb 2008 10:28 Re: Blocking and Non-Blocking assignment |
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| Read the snug paper linked by NanhTrang. Would be a wast of time trying to explain the topic better.
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NanhTrang
Joined: 13 Aug 2006
Posts: 18
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| 04 Feb 2008 10:31 Blocking and Non-Blocking assignment |
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Hi,
@Frank: Maybe I'm not good enough to code mix blocking and non-blocking assignments so I just simply separate them.
@Tauqueer: Please take a look at the paper I posted above. It have everything you are asking for.
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FvM
Joined: 22 Jan 2008
Posts: 2315
Helped: 385
Location: Bochum, Germany
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| 04 Feb 2008 11:51 Re: Blocking and Non-Blocking assignment |
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Hello,
| Quote: |
| Maybe I'm not good enough to code mix blocking and non-blocking assignments so I just simply separate them. |
I think that's basically o.k. My view is formed by VHDL, which I use mostly. As I said, you have an VARIABLE object there, that receives "blocking assignments" (the "blocking" term isn't used in VHDL, only a ":=" operator instead of "<="). One possible purpose is to assign intermediate results to a VARIABLE object, possibly chaining multiple assignments to the same variable in a sequence. The final result can be assigned to a SIGNAL (= reg) within the same clock cycle. In a similar Verilog construct, you would mix blocking and non-blocking assignments.
Regards,
Frank
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alam.tauqueer
Joined: 19 Jun 2007
Posts: 132
Helped: 3
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| 04 Feb 2008 13:23 Blocking and Non-Blocking assignment |
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I went through the paper now things are clear to me .
Thanks alot to all.
Regards
Tauqueer
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madhavisai
Joined: 03 Feb 2008
Posts: 23
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| 04 Feb 2008 18:31 Blocking and Non-Blocking assignment |
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if u use non blocking assignment statements the values are assigned after current simulation,whereas in blocking values r assingned straight away
one more thing in posedge of clock if u write blocking in synthesis u will get ff/latch
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mohaddin
Joined: 24 Nov 2005
Posts: 15
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| 03 May 2008 16:40 Blocking and Non-Blocking assignment |
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Hi Alll
Just go through verilog Basics by salman palnitkar,
its good book for verilog basics.
regards
Mohi
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badola
Joined: 04 Jan 2008
Posts: 86
Helped: 1
Location: bangalore
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| 05 May 2008 5:16 Re: Blocking and Non-Blocking assignment |
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check this pdf....hope it ll help u
http://www.edaboard.com/viewtopic.php?p=567617#567617
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basha_vlsi
Joined: 19 Mar 2008
Posts: 23
Helped: 2
Location: Hyderabad, India
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| 13 May 2008 11:04 Re: Blocking and Non-Blocking assignment |
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Both statement blocks are correct.
But using non blocing stmt assignment is good practice and using blocking stmt is bad coding style
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Tan
Joined: 23 Jul 2006
Posts: 123
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| 20 May 2008 13:13 Re: Blocking and Non-Blocking assignment |
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correct me if i am wrong..
Blocking assignment is similar to the variable assignment in vhdl...
and non-blocking is similar to signal assignment in vhdl..
In blocking the data is assigned immediately but in non -blocking the data is assigend in the next clock cycle..
please let me know if i am wrong..
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