electronics forum

Rules | Recent posts | topic RSS | Search | Register  | Log in

what's the different between Logic cell and CLB?


Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> what's the different between Logic cell and CLB?
Author Message
BooM



Joined: 30 Aug 2007
Posts: 76
Helped: 2


Post18 Jan 2008 0:44   

what's the different between Logic cell and CLB?


hi all,

Can you explain me what's the different between logic cell and clb?

I have confused!

Thank you!

B.
Back to top
echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566


Post18 Jan 2008 4:06   

Re: what's the different between Logic cell and CLB?


That sounds like a Xilinx FPGA question. Those confusing terms, especially "CLB", have various meanings depending on which FPGA family you are referring to. It's best to search for definitions in the data sheet of the particular FPGA family. For example, here are some words from the Spartan-3E data sheet:

The combination of a LUT and a storage element is known as a “Logic Cell”.

The Configurable Logic Blocks (CLBs) constitute the main logic resource for implementing synchronous as well as combinatorial circuits. Each CLB contains four slices, and each slice contains two Look-Up Tables (LUTs) to implement logic and two dedicated storage elements that can be used as flip-flops or latches.


However, the CLB is arranged differently in, say, a Virtex-5.

The term "logic cell" is more often used in Xilinx CPLDs than Xilinx FPGAs.
Back to top
kishore2k4



Joined: 17 Jun 2006
Posts: 293
Helped: 33


Post18 Jan 2008 4:52   

Re: what's the different between Logic cell and CLB?


Actually "logic cells" are specified in most Xilinx FPGA spec sheets as "equivalent logic elements/logic cells" which as echo47 mentioned is like the smallest logical unit of a FPGA/PLD. You can safely compare logic elements in altera devices to equivalent logic cells in Xilinx devices.

Virtex-5 has 4 LE's/Slice.Stratix III uses ALM (Adaptive Logic Modules) which are similar to Virtex-5 but Altera claims they have higher density. Overall it can be very confusing until you know the underlying architecture of elements. Hope I didn't confuse you further.
Back to top
BooM



Joined: 30 Aug 2007
Posts: 76
Helped: 2


Post18 Jan 2008 12:30   

Re: what's the different between Logic cell and CLB?


hi again,
So, you can say that logic cells are elements into clbs...no?

thank you for your replies!

B.
Back to top
Google
AdSense
Google Adsense




Post18 Jan 2008 12:30   

Ads




Back to top
echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566


Post19 Jan 2008 1:26   

what's the different between Logic cell and CLB?


Yes. For example, in a Spartan-3E:
Each CLB contains four slices.
Each slice contains two logic cells.
Each logic cell contains one LUT and one D-flop.

You can see diagrams of those sections in the Spartan-3E data sheet paragraph "Configurable Logic Block (CLB) and Slice Resources" beginning on page 22 (assuming version May 29 2007):
http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf

Each slice also contains additional useful goodies such as multiplexers and fast carry logic.
Back to top
kib



Joined: 27 Mar 2003
Posts: 123
Helped: 7
Location: Bangalore, India


Post28 Jan 2008 6:58   

Re: what's the different between Logic cell and CLB?


1 LUT = 1.125LC's
Check this answer from Peter Alfke
http://newsgroups.derkeiler.com/Archive/Comp/comp.arch.fpga/2006-06/msg00096.html
Back to top
echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566


Post28 Jan 2008 8:07   

what's the different between Logic cell and CLB?


In that message, Peter suggested to forget the old relationship about 1 LUT = 1.125 LCs.
Back to top
jacocobi



Joined: 08 May 2007
Posts: 8


Post28 Jan 2008 14:58   

what's the different between Logic cell and CLB?


1 x CLB = 2 or 4 x Slices
1 x Slice = 2 x logic cells
1 x logic cell = 1 x 4 input LUT + 1 x MUX + 1 x REG
That is it, quite simple...
Back to top
Arabic versionBulgarian versionCatalan versionCzech versionDanish versionGerman versionGreek versionEnglish versionSpanish versionFinnish versionFrench versionHindi versionCroatian versionIndonesian versionItalian versionHebrew versionJapanese versionKorean versionLithuanian versionLatvian versionDutch versionNorwegian versionPolish versionPortuguese versionRomanian versionRussian versionSlovak versionSlovenian versionSerbian versionSwedish versionTagalog versionUkrainian versionVietnamese versionChinese version
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> what's the different between Logic cell and CLB?
Page 1 of 1 All times are GMT + 1 Hour
Similar topics:
what's the different between serial pattern and parallel ? (4)
what's the different between CPW and Microstrip line? (4)
who can tell me what's the different between db and xg mode (1)
help--what's the different between vhdl and ahdl and verilog (3)
What's the difference between dummy cell & spare cell? (4)
what's the diff between Pre_layout and Post cell delay cal (4)
What's different between the two filters? (5)
What's different between LASERs and LEDs? (18)
what's different between Floorplan Compiler and JupiterXT? (4)
Difference between Logic cell & Logic gate? (4)


Abuse || Administrator || Moderators || Support us || sitemap
topic RSS