[HELP] power lookup table in synopsys .lib

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Leon_Lee

Joined: 19 Mar 2007
Posts: 6

28 Nov 2007 2:21 synopsys .lib internal power

Can anybody tell me how to estimate the power consumption in synopsys .lib file?
What's the Unit, uW/MHz?

eg: 0.18um inverter
If i use C×Vdd²×f to calculate the dynamic power, then 0.00200pF loading matches the result (0.00200p×1.8²×1MHz = 0.00648uW, which is less than 0.008075 in the table).
but 0.396000pF loading will lead to 1.28304uW/MHz dynamic power which exceeds the table values.
Why? What's wrong in my calculation and how to simulation the exact result in hspice?

Thanks so much.

power(POWER_6x6) {
index_1("0.017781, 0.035049, 0.084996, 0.295467, 0.716298, 1.768073");
index_2("0.002000, 0.005759, 0.016584, 0.047756, 0.137519, 0.396000");
values("0.008075, 0.008227, 0.008519, 0.008724, 0.008802, 0.008827",\
"0.007953, 0.008058, 0.008344, 0.008638, 0.008802, 0.008868",\
"0.008223, 0.008158, 0.008214, 0.008430, 0.008669, 0.008811",\
"0.012750, 0.011937, 0.010793, 0.009635, 0.008930, 0.008813",\
"0.026010, 0.024221, 0.021112, 0.017065, 0.013206, 0.010616",\
"0.062021, 0.059013, 0.052870, 0.043258, 0.031751, 0.021226");
}

onlymusic16

Joined: 19 Sep 2007
Posts: 146
Helped: 4

28 Nov 2007 15:07 internal power and switching power + .lib

The power in the .lib file comes after you characterize a cell (in your case its inverter) exhaustively. While characterizing the circuit, a designer doesnt know if the cell would work at 1MHz or 2 MHz. All he knows is the input slew and the output load, so based on these two values the power values are calculated. These power values are largely dependent on the current required to charge/discharge the load. This current is usually integrated over a period of time and then multiplied by vdd to calculate power and any good simulator like hspice should be able to do it easily(you donot need to worry about the integration methods). Please note this power is the dynamic power of the circuit.

I would suggest you to go through the dynamic power of a cell and its components.

Hope this helped you!

Added after 3 minutes:

I am sorry i forgot to answer your last question, to match your numbers with the table entries, calculate the current through the load and multiply with vdd.

rajesh9999

Joined: 19 Oct 2005
Posts: 44
Helped: 2

29 Nov 2007 2:53 how to calculate dynamic power of a cell

The table in the .lib is NOT switching power (f*C*V^2)!. It is DC short circuit power, which is dc current flowing from VDD to ground when both the p and n transistors are ON. It is a function of rise (or fall) time which in turn depends on input slew and output load. Thats why it is in a two dimensional format similar to delay table. The swicthing power due to gate capacitances of transistors of a library cell is indirectly calculated when power complier calcuates the total power consumed by the design ==short circuit dc power which it gets from the .lib table + switching power (formula f*C*V^2) which it calculates by adding capacitance of inteconnect and the input capacitance of the next cell. Hope this clears your understanding.

As far as power models of more complex library cells (blackbox, memories, hard module ..etc), I dont know how the switching capacitances of internal transistors are embedded in the .lib power model. It obviously is dependant on frequency so I am wondering how its is modelled. If anyone knows answer, I would be appreciate the response. Thanks

Leon_Lee

Joined: 19 Mar 2007
Posts: 6

29 Nov 2007 8:48 synopsys liberty power computation

rajesh9999 wrote:

Hi, rajesh9999

Thanks for reminding me.
I've checked the databook. It's Short Circuit power not Switching power.
And, libraray vendor gives a formula to estimate the switching power. That is ½×C×V²×Ftoggle.

As referred to complex cells, i found no switching power either. Maybe the internal capacitance can be ignored. Or, vendor gives other method to calculate the consumption.
Quote your words, "If anyone knows answer, I would be appreciate the response."

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master_picengineer

Joined: 03 Sep 2007
Posts: 1050
Helped: 62

29 Nov 2007 9:52 +cell power +load +synopsys

Hi all,

Can somebody upload the databook. I wanna really know what the parameters in the lib stand for.

Thanks.

onlymusic16

Joined: 19 Sep 2007
Posts: 146
Helped: 4

29 Nov 2007 11:06 synopsys .lib file format power unit

onlymusic16 wrote:

Sorry a typo error, The last line was - this power is ONE OF THE COMPONENTS of dynamic power.

To sum up, rajesh has given the right explanation but i would like to add that The dynamic power of a circuit is composed of Internal power & Switching power. During switching, a circuit dissipates internal power by the charging or discharging of any existing capacitances internal to the cell. The definition of internal power includes power dissipated by a momentary short circuit between the P and N transistors of a gate, called short-circuit power.

IN MOST SIMPLE LIBRARY CELLS, internal power is due primarily to short-circuit power. For this reason, the terms internal power and short-circuit power are often considered synonymous. But for huge complex and memory circuits, they are not same.

Hence, look at the lib file and check if the output pin capacitance is zero or non-zero. If its zero, it means the effect of the output capacitance in the internal power has been considered( which gives the output pin zero capacitance).

Added after 1 minutes:

and please correct me if i am wrong Very Happy