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devop
Joined: 05 Dec 2006
Posts: 87
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 05 Nov 2007 8:15 start up circuit problem |
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hi ,can anyone tell me how the start up circuit works?
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mpig09
Joined: 26 Aug 2005
Posts: 132
Helped: 6
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05 Nov 2007 11:36 Re: start up circuit problem |
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Dear devop :
When VDD increases from 0V-->VDD slowly and under 1V, inverter(P2, N2)
input is "Logic 1", then P3 turn on.
When VDD increases over 1V, inverter(P2, N2) input is "Logic 0" then P3 turn
off.
I hope this will help you.
mpig
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05 Nov 2007 11:36 Ads |
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vicky
Joined: 11 Aug 2004
Posts: 240
Helped: 19
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05 Nov 2007 11:39 Re: start up circuit problem |
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HI DEAR,
kindly clear one thing please that are both sources are vdd or one of these is vss source, kindly clearify
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master_picengineer
Joined: 03 Sep 2007
Posts: 1050
Helped: 62
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05 Nov 2007 12:32 start up circuit problem |
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| Are you sure about your schematic ?
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devop
Joined: 05 Dec 2006
Posts: 87
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06 Nov 2007 13:38 Re: start up circuit problem |
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| mpig09 wrote: |
Dear devop :
When VDD increases from 0V-->VDD slowly and under 1V, inverter(P2, N2)
input is "Logic 1", then P3 turn on.
When VDD increases over 1V, inverter(P2, N2) input is "Logic 0" then P3 turn
off.
I hope this will help you.
mpig |
can you explain why inverter(P2, N2) input is "Logic 1", ???
vicky: I don't undestand you.
picengineer:I get the circuit from a real chip,but I don't know how the circuit work,maybe it's useless,who konws 
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mpig09
Joined: 26 Aug 2005
Posts: 132
Helped: 6
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07 Nov 2007 1:20 Re: start up circuit problem |
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Dear all :
It is my mistake, I think vicky's suggest is right.
When the gate of P1 connects vss, the function looks right.
The "logic 1" is not real power supply voltage, when vdd increase
but under 1V, P1 will output the VDD value, the value is under 1V, but this
voltage need to driver N2 to turn on, so the size of NMOS I think can't the
same when you want a start up function.
mpig
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