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mitgrace
Joined: 08 May 2004
Posts: 368
Helped: 4
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 25 Oct 2007 15:27 The psot-sim of MOM-cap |
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DearAll :
Does any other have good to extract the MOM-cap (cap fringer) , Now I design
0.18um MOM-cap with VIA. I use calibre to do extraction, But I found the command files mo define VIA-to-VIA information, So that the cap is low than the practical ,DOes anyone have good method to expect the value. Thanks
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hyy95120
Joined: 21 Oct 2005
Posts: 36
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26 Oct 2007 20:39 The psot-sim of MOM-cap |
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| then u can use less vias so your extracted cap is close to reality.
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mitgrace
Joined: 08 May 2004
Posts: 368
Helped: 4
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27 Oct 2007 2:22 Re: The psot-sim of MOM-cap |
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The calibre-xrc files don't deifne VIA information, If I use the less VIA, Does the cap is different ? I will try it , Thanks.
I have another question , Does you around the Nwell to ring the MOM-cap ,
if we don't use Nwell to around it. Do anyone have any comment . Thanks
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Google
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27 Oct 2007 2:22 Ads |
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standup
Joined: 25 Oct 2006
Posts: 32
Helped: 2
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29 Oct 2009 17:53 Re: The psot-sim of MOM-cap |
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Anyone could give some information about MOM? The layout is preferred.
Thank you very much!
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timof
Joined: 21 Feb 2008
Posts: 86
Helped: 6
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30 Oct 2009 6:41 Re: The psot-sim of MOM-cap |
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I attach a short application note "MOM capacitor design challenges and solutions" that addresses the questions discussed here.
Regarding vias - if you remove vias, this would decrease capacitance density and probably increase series resistance of MOM capacitor. Don't do this if you want to achieve maximum possible capacitance density.
Max
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