Rules | Recent posts | topic RSS | Search | Register  | Log in

FIFO depth calculation

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Author Message
ppallavi



Joined: 05 Oct 2007
Posts: 11


Post09 Oct 2007 8:20   FIFO depth calculation

A FIFO has following data rate. What is depth of that?

incoming data = 80 words at 100 clks
outgoing data = 8 words per 10 clks
read clk = write clk

fifo data width = 1 word.

What is the fifo width for this configuration?
Back to top
sree205



Joined: 13 Mar 2006
Posts: 394
Helped: 30


Post09 Oct 2007 8:44   FIFO depth calculation

Before going to the fifo width portion, can you tell me how 8 words are written in 10 clock cycles? is there any latency involved ?

from what i can see, 8 words in 10 clock cycles and 80 words in 100 clock cycles are the same, only difference might be the delay involved.

correct me if i'm wrong.
Back to top
ppallavi



Joined: 05 Oct 2007
Posts: 11


Post09 Oct 2007 8:57   Re: FIFO depth calculation

no delays are mentioned. But, as it is a asynchronous FIFO, read and write clks are not same(not in phase)...so FIFO is required. Need to calculate its depth.
Back to top
varkylin



Joined: 30 Sep 2007
Posts: 22


Post09 Oct 2007 9:35   FIFO depth calculation

Hi ppallavi:
a few days ago,i also have the same question, shavakmm give me the answer which calculate the depth of FIFO ,the link is as follows,you can see it
http://www.edaboard.com/ftopic274981.html
BR.
Back to top
vamsi_addagada



Joined: 05 Jul 2007
Posts: 90
Helped: 3


Post09 Oct 2007 10:36   FIFO depth calculation

hi pallavi.
u see the asic-world.com site is there fifo depth calculation

vamsi
Back to top
ppallavi



Joined: 05 Oct 2007
Posts: 11


Post10 Oct 2007 6:23   Re: FIFO depth calculation

What is the answer of the question? there is no burst mentioned..
Back to top
salma ali bakr



Joined: 27 Jan 2006
Posts: 940
Helped: 74


Post10 Oct 2007 12:56   Re: FIFO depth calculation

why don't you get more info about ur FIFO
or try to match the one here to the equation given by the other post Smile
Back to top
satyakumar



Joined: 18 May 2006
Posts: 186
Helped: 11
Location: Bangalore


Post10 Oct 2007 13:13   Re: FIFO depth calculation

Hi PPallavi,
In this there are two cases we have to consider in determing the depth,

1)Best case: The incoming data is 80words /100clk i.e the data starts writing for 80clks and remains idle for 20clks.
In this case for reading 80 words at the rate 8 words/10clks requires 100clks. so, the fifo size is 20words.

2)worst case: The incoming data idle for 20clk and starts writing at 20th clk onwords and second write starts with 101th clk completes writing at 180th clk and idle upto 200th clk, hence in this case there are total 160words write in 200clk.
But read starts from 20th clock and completes at 220th clk, hence in this case the fifo size is 40.

so, the answer is 40.

If its wrong kindly corect it.

Thanks and Regards
satyakumar
Back to top
sanjay11



Joined: 07 Dec 2006
Posts: 27


Post14 Oct 2007 18:39   Re: FIFO depth calculation

The answer is 32.

Consider the below mentioned case.

Read Window
<---80---><---20---><----20---><---80---->
80 read followed by 20 empty cycles.
20 empty cycles followed by 80 read cycles.

Max writes can happen in this (20 + 20 ) cycles window is 8 x 4 = 32 .
Back to top
ppallavi



Joined: 05 Oct 2007
Posts: 11


Post15 Oct 2007 8:39   Re: FIFO depth calculation

Hi ,

Thank you for the reply.

Can you please elaborate "8x4 = 32 " part in the reply.

Thanks.
Back to top
bharat_in



Joined: 05 Oct 2006
Posts: 67
Helped: 1


Post15 Oct 2007 12:09   Re: FIFO depth calculation

@sanjay11
Here read is 8 words per 10 clks, So, you must have to spend 2 idle cycles/10 clk cycles, i.e. you can not read continuosly for 80 cycles and spend 20 idle cycles later...

Worst write can be as follows: (Just creating a diagram from, what satyakumar has mentioned)

<-20-><-80->|<-80-><-20->
First burst | second burst

Here, effective writing is only for 160 clock cycles, So worst write is 160 words/160 clks.

Now, Read speed is 8 words/ 10 clk cycles.
So, in 160 (16 * 10) read clk cycles, we can read 128(16 * 8 ) words. reamaining words we need to store in fifo. that is 32(160 - 128).

So, I guess fifo depth need to be 32 only...

Please, let me know if this calculation is wrong.
Correction is always invited Very Happy
Back to top
sanjay11



Joined: 07 Dec 2006
Posts: 27


Post16 Oct 2007 9:52   Re: FIFO depth calculation

Hi bharat_in,

sorry, I misinterpreted the problem,
my understanding was 8/10 is write ratio,
and 80/100 is read ratio.

but even in this case depth is 32, as you said.
<----Incoming data stream worst case-->
<--20--><--80--><--80--><--20-->
<Empty><----Data------><Empty>
Worst case is 160 clocks continuous incoming data.
For everyoutgoing 10, accumulation of 2 happens.
max that can go out is 16 x 2 = 32.

Sorry for my mistake.
Back to top
pradeep2323



Joined: 02 Nov 2006
Posts: 24


Post16 Oct 2007 11:06   Re: FIFO depth calculation

Hi,


One of the most common questions in interviews is how to calculate the depth of a FIFO. Fifo is used as buffering element or queueing element in the system, which is by common sense is required only when you slow at reading than the write operation. So size of the FIFO basically implies the amount of data required to buffer, which depends upon data rate at which data is written and the data rate at which data is read. Statistically, Data rate varies in the system majorily depending upon the load in the system. So to obtain safer FIFO size we need to consider the worst case scenario for the data transfer across the FIFO under consideration.



For worst case scenario, Difference between the data rate between write and read should be maximum. Hence, for write operation maximum data rate should be considered and for read operation minimum data rate should be considered.



So in the question itself, data rate of read operation is specified by the number of idle cycles and for write operation, maximum data rate should be considered with no idle cycle.



So for write operation, we need to know Data rate = Number of data * rate of clock. Writing side is the source and reading side becomes sink, data rate of reading side depends upon the writing side data rate and its own reading rate which is Frd/Idle_cycle_rd.



In order to know the data rate of write operation, we need to know Number of data in a Burst which we have assumed to be B.



So following up with the equation as explained below: Fifo size = Size to be buffered = B - B * Frd / (Fwr* Idle_cycle _rd ).



Here we have not considered the sychnronizing latency if Write and Read clocks are Asynchronous. Greater the Synchronizing latency, higher the FIFO size requirement to buffer more additional data written.



Example : FIFO Depth Calculation


Assume that we have to design a FIFO with following requirements and We want to calculate minumum FIFO depth,



A synchronized fifo
Writing clock 30MHz - F1
Reading clock 40MHz - F2
Writing Burst Size - B
Case 1 : There is 1 idle clock cycle for reading side - I
Case 2 : There is 10 idle clock cycle for reading side - I



FIFO depth calculation = B - B *F2/(F1*I)



If if we have alternate read cycles i.e between two read cycle there is IDLE cycle.

FIFO depth calculation = B - B * F2/(F1*2)



In our present problem FIFO depth = B - B *40/(30*2)

= B(1-2/3)

= B/3



That means if our Burst amount of data is 10 , FIFO

DEPTH = 10/3 = 3.333 = 4 (approximatly)



If B = 20 FIFO depth = 20/3 = 6.6 = 7

or 8 (clocks are asynchronous)



If B = 30 FIFO depth = 30/3 = 10

10+1 = 11 (clocks are asynchronous)



If 10 IDLE cycles betweeen two read cycles .

FIFO DEPTH = B - B *F2/(F1*10) .

= B(1-4/30)

= B * 26 /30

Added after 24 seconds:

Hi,


One of the most common questions in interviews is how to calculate the depth of a FIFO. Fifo is used as buffering element or queueing element in the system, which is by common sense is required only when you slow at reading than the write operation. So size of the FIFO basically implies the amount of data required to buffer, which depends upon data rate at which data is written and the data rate at which data is read. Statistically, Data rate varies in the system majorily depending upon the load in the system. So to obtain safer FIFO size we need to consider the worst case scenario for the data transfer across the FIFO under consideration.



For worst case scenario, Difference between the data rate between write and read should be maximum. Hence, for write operation maximum data rate should be considered and for read operation minimum data rate should be considered.



So in the question itself, data rate of read operation is specified by the number of idle cycles and for write operation, maximum data rate should be considered with no idle cycle.



So for write operation, we need to know Data rate = Number of data * rate of clock. Writing side is the source and reading side becomes sink, data rate of reading side depends upon the writing side data rate and its own reading rate which is Frd/Idle_cycle_rd.



In order to know the data rate of write operation, we need to know Number of data in a Burst which we have assumed to be B.



So following up with the equation as explained below: Fifo size = Size to be buffered = B - B * Frd / (Fwr* Idle_cycle _rd ).



Here we have not considered the sychnronizing latency if Write and Read clocks are Asynchronous. Greater the Synchronizing latency, higher the FIFO size requirement to buffer more additional data written.



Example : FIFO Depth Calculation


Assume that we have to design a FIFO with following requirements and We want to calculate minumum FIFO depth,



A synchronized fifo
Writing clock 30MHz - F1
Reading clock 40MHz - F2
Writing Burst Size - B
Case 1 : There is 1 idle clock cycle for reading side - I
Case 2 : There is 10 idle clock cycle for reading side - I



FIFO depth calculation = B - B *F2/(F1*I)



If if we have alternate read cycles i.e between two read cycle there is IDLE cycle.

FIFO depth calculation = B - B * F2/(F1*2)



In our present problem FIFO depth = B - B *40/(30*2)

= B(1-2/3)

= B/3



That means if our Burst amount of data is 10 , FIFO

DEPTH = 10/3 = 3.333 = 4 (approximatly)



If B = 20 FIFO depth = 20/3 = 6.6 = 7

or 8 (clocks are asynchronous)



If B = 30 FIFO depth = 30/3 = 10

10+1 = 11 (clocks are asynchronous)



If 10 IDLE cycles betweeen two read cycles .

FIFO DEPTH = B - B *F2/(F1*10) .

= B(1-4/30)

= B * 26 /30
Back to top
shockie



Joined: 10 Jul 2002
Posts: 104
Helped: 1


Post17 Oct 2007 6:27   FIFO depth calculation

more information on
http://www.asic-world.com/tidbits/fifo_depth.html.
a great website for beginners.
Back to top
kvramana9907



Joined: 17 Oct 2007
Posts: 1


Post17 Oct 2007 14:48   Re: FIFO depth calculation

Let us consider your case:

incoming data = 80 words at 100 clks
outgoing data = 8 words per 10 clks
read clk = write clk

While calculating depth of fifo, we need to consider the worst case. So assume that first 20 clks are idle i.e there is no write into fifo.write is started from 21st clk and 80 words are written continuously into fifo till 100th clk.
Read also started from 21st clk with 8 words per 10 clks. So maximum 64 words can be read till 100th clks so (80 - 64 = 16) are left over without read.

Hence the fifo depth is 16.
Back to top
sanjay11



Joined: 07 Dec 2006
Posts: 27


Post29 Oct 2007 15:45   Re: FIFO depth calculation

16 is not correct answer.
Back to top
jkang



Joined: 25 Oct 2007
Posts: 7


Post29 Oct 2007 17:49   Re: FIFO depth calculation

It's 32.

Since you didn't specify duty cycle, the worst case condition is two 80-word writes back-to-back on the write side. That is:

<20 cycles idle> <80 cycles write> <80 cycles write> <20 cycles idle>

This means that 160 writes will occur consecutively. Assuming read begins at the same time as write begins (ignoring logic and control delays), the read side will be able to read (160/10)*8 = 128 words in that 160 cycles time (reading 8 words per 10 cycles). The timing looks like:

Write side: < 10 writes > < 10 writes > < 10 writes > ...
Read side: <8 reads><2 idle> <8 reads><2 idle> <8 reads><2 idle> ...

This means that at the end of the 160 cycle burst, there will be 160-128 = 32 words left over in the FIFO to read. Your FIFO will need to be 32 words deep.
Back to top
kushagrak



Joined: 27 Feb 2008
Posts: 45


Post21 Jun 2008 12:55   Re: FIFO depth calculation

Finally which answer is correct...........

Any wayz..........Thanks alot for ur precious time.
Back to top
raul_777_h



Joined: 27 Dec 2007
Posts: 9


Post25 Jun 2008 11:19   FIFO depth calculation

I also think 32 is the answer.
Back to top
sp3



Joined: 01 Jan 2008
Posts: 65
Helped: 4


Post27 Jun 2008 4:49   Re: FIFO depth calculation

Hi Pallavi,

I am attaching a PDF file.. Plz go through this.. I think it will solve your basic doubts Smile

Thanks,
sp3



Sorry, but you need login in to view this attachment

Back to top
BlackOps



Joined: 02 Jan 2005
Posts: 270
Helped: 9
Location: AZERBAIJAN


Post10 Jul 2008 11:18   Re: FIFO depth calculation

sp3 thanks for the attached paper, i read it, but i still have questions...

please take a look at Case 2 and Case 3 inside your paper...

in Case2 at the end there is sentence:
Now divide with highest frequency time period = 160/10ns=16

and in Case3 there is following sentence:
Now Divide by the lowest frequency time period = 600/400 = 1.5 = 2

in both cases writing speed is more than reading speed... why in Case2 you divide with HIGHEST frequency time period, and in Case3 you divide with LOWEST frequency time period?

thanks!
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Page 1 of 1 All times are GMT + 2 Hours


Abuse
Administrator
Moderators
topic RSS 
sitemap