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master_picengineer
Joined: 03 Sep 2007 Posts: 1050 Helped: 62
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24 Sep 2007 10:18 Clock recovery |
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Hi,
I think about designing a Clock recovery module.
How should i proceed ?
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plusminus
Joined: 27 Jul 2007 Posts: 98 Helped: 12 Location: the Netherlands
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24 Sep 2007 10:47 Re: Clock recovery |
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Where do you want to recover your clock from?
Manchester code?
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master_picengineer
Joined: 03 Sep 2007 Posts: 1050 Helped: 62
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24 Sep 2007 13:51 Clock recovery |
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Hi plusminus,
Yes for the first version of the design i will recover the clock from a serial Manchester Coded signal. For the second version, and in the hope of reducing power due to switching activity, the recovery will be from a NRZ coded signal.
Added after 2 hours 50 minutes:
VHDL will be used as specification language. Please teel me how to proceed.
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nxtech
Joined: 13 Jun 2007 Posts: 257 Helped: 15 Location: Watching You!
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24 Sep 2007 14:29 Re: Clock recovery |
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Your question on how do I proceed tells me that you dont truly understand the basics of Manchester or NRZ encoding. If you did then you would understand how to pull the clock signal from either encoding method.
Take sometime and do some research before you start a project like that.
E
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master_picengineer
Joined: 03 Sep 2007 Posts: 1050 Helped: 62
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24 Sep 2007 14:41 Clock recovery |
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| In fact I am new in this domain. That I wanna know is to understant the recovery principle. The thing that i couldn't understand is how to generate the clock from a signal when there we hava a sequece of '1' or '0'. You can consider the worst case obtained in a simple non coded signal.
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nxtech
Joined: 13 Jun 2007 Posts: 257 Helped: 15 Location: Watching You!
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24 Sep 2007 15:33 Re: Clock recovery |
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The clock is part of the datastream. Go to this link and start reading.
http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?iLanguageID=1&category=-1209840&BV_SessionID=@@@@0809413983.1190644458@@@@&BV_EngineID=ccceaddllfjgmlecefeceihdffhdfkf.0
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24 Sep 2007 15:33 Ads |
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plusminus
Joined: 27 Jul 2007 Posts: 98 Helped: 12 Location: the Netherlands
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24 Sep 2007 15:51 Re: Clock recovery |
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The total story is a bit to long to explain but in essence it works like this:
At the transmitter side you multiplex the bitstream data with a clock ( exor ).
At the receiver side you can extract the data and clock by a (D)PLL circuit.
See also: http://www.xilinx.com/bvdocs/appnotes/xapp339.pdf
http://www.ee.iitm.ac.in/~balajis/EE500/Manchester.pdf [/img]
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master_picengineer
Joined: 03 Sep 2007 Posts: 1050 Helped: 62
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25 Sep 2007 8:55 Clock recovery |
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| Thank too much nxtech and plusminus.
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