Looking for USB -> JTAG verilog code

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GoldServe

Joined: 29 Jun 2005
Posts: 31

09 Sep 2007 8:17 jtag verilog

Hi,

I am trying to build my own usb to jtag converter. I have the board all designed but i'm looking for some help in getting the state machine started for the jtag communications part.

Basically, I am using a USB chip that has an 8-bit parallel bus for the data and a few IOs that I can use to trigger the state machine on the CPLD.

I am looking for some code with a state machine in verilog to send standard JTAG commands and data ( and reading back).

Any help would be appreciated!

kishore2k4

Joined: 17 Jun 2006
Posts: 293
Helped: 33

09 Sep 2007 8:29 usb to jtag converter

There is a JTAG TAP controller project at opencores.org
http://www.opencores.org/projects.cgi/web/jtag/overview

It is the same inteface that is used in the OR1200 RISC processor. I am not sure if you can fit the jtag controller plus interface logic in a CPLD though. If I am not wrong, xilinx platform USB uses a USB micrcontroller and does everything in software.

GoldServe

Joined: 29 Jun 2005
Posts: 31

09 Sep 2007 8:31 jtag tap verilog

I saw that but it is probably not what i'm looking for right? Doesn't this go on the chip and is on the other end of JTAG? Controlling all the boundary scan registers, etc?

I'm looking for basically a parallel to serial converter that has a jtag state machine so I can send serial jtag commands to a chip. Cheers!

kishore2k4

Joined: 17 Jun 2006
Posts: 293
Helped: 33

09 Sep 2007 13:26 tap controller verilog

Oh, In that case that isn't right for you. I've never worked on the JTAG state machine before but I think you can simply pick 4 pins out of those 8 and do the rest in software like most JTAG adapters, unless you have specifically picked this CPLD based design. Care to expand on what exactly you intend your final product to be?

GoldServe

Joined: 29 Jun 2005
Posts: 31

09 Sep 2007 18:37 usb verilog code

I'm looking to make a very high speed jtag flash programmer so I need a hardware based design. Basically i'm looking for a TAP Master...

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GoldServe

Joined: 29 Jun 2005
Posts: 31

13 Sep 2007 0:28 jtag verilog

I started to program my own TAP master but find it very hard to fit it into the MAX300E with 32 macrocells. I know it can be done.

The specs are an input clock of 24MHZ and the JTAG clock is 500hertz. Anyways, I have the specs of the TAP master in pictures below. If someone can come up with some easy way to reproduce the JTAG Signals given the usb signals, please post a snippet of what you did. Thanks!