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How to implimente a CDR (clock and data recovery) circuits.
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dd2001



Joined: 14 Apr 2002
Posts: 282
Post17 Jul 2002 23:31   

cdr clock
Any one know this topic? I aready know PLL, but how to apply PLL to it?
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shell3



Joined: 28 Mar 2002
Posts: 36
Post18 Jul 2002 2:55   
Basically the PLL is used to regenerate the clock from the data
stream. The clock is aligned with the center of the data patern,
so that the data can be deserialised. The data is generally scrambled
to insure there is a minimum transitions per unit of time to keep
the PLL locked.

If you do a search for SONET OC12 components you will find a lot
of doc relative to CDR.
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vsop



Joined: 24 Aug 2001
Posts: 54
Location: east
Post19 Jul 2002 19:18   
I'm not sure if this is what you want.
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Google
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Post19 Jul 2002 19:18   

Ads


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vsop



Joined: 24 Aug 2001
Posts: 54
Location: east
Post19 Jul 2002 19:21   
sorry, a mistake!
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vsop



Joined: 24 Aug 2001
Posts: 54
Location: east
Post19 Jul 2002 19:23   
and its codes!
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dd2001



Joined: 14 Apr 2002
Posts: 282
Post19 Jul 2002 21:12   

Thanks both pf shell3 and vsop.
Embarassed Embarassed Embarassed Embarassed Embarassed
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andy2000a



Joined: 18 Jul 2001
Posts: 767
Helped: 7
Post13 Sep 2002 11:11   

use multi phase clock select data
use multi phase clock , & select "right" clock to fit "setup time "
usual let "sampling clk in middle of "in_data" "
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layes2



Joined: 03 Dec 2004
Posts: 346
Helped: 5
Post18 May 2005 8:09   

Re: How to implimente a CDR (clock and data recovery) circui
cdr
youcan use pll
or dll
oversample
or
*n speed clock
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power-twq



Joined: 10 Jun 2005
Posts: 374
Helped: 3
Post14 Jun 2005 4:33   

Re: How to implimente a CDR (clock and data recovery) circui
you can use pll (with a ring osc for VCO) to generate multiple clocks

with different phase (for example 0, 45, 90, 135, 180, 225, 270, 315),

then use some algorithm to select appropriate phase clock to use.




dd2001 wrote:
Any one know this topic? I aready know PLL, but how to apply PLL to it?
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