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How to define Static timing analysis and Dynamic Timing


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phutanesv



Joined: 26 Apr 2007
Posts: 150
Helped: 12


Post10 May 2007 13:05   

How to define Static timing analysis and Dynamic Timing


Dear friends,

What is the correct explanation like definition of Static timing and Dynamic timing analysis? in a simple way.
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Post10 May 2007 13:05   

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vlsichipdesigner



Joined: 09 May 2007
Posts: 112
Helped: 6


Post10 May 2007 16:15   

Re: How to define Static timing analysis and Dynamic Timing


Static Timing Analysis is a methodology to analyze and validate timing on all the timing paths in a Chip.
The various timing paths in a Chip are
1. Purely combinational path(path starting from chip input port and ending at chip output port).
2. Path starting from input port and ending at the Data input of a Register.
3. Path starting from output of a register and ending at the output port of a chip.
4. Purelyregister to register path (Reg to Reg path)

The best part of static timing analysis is , it qualifies all your timing paths of your chip. The only disadvantage is this approach is by mistake if you have applied a false or multicycle paths then it would not be covered.

But Dynamic Timing analysis is otherwise called as Gate level Simulations with timing information. In this you will be validating with a test vector (your chip application specific). In this you are guaranting the timing of the chip only for the test cases you are interested with. The quality of the simulation depends on the quality of your test-case. But the only advantage or the purpose Dynamic timing simulation is a mechanism to catch the false or multicycle paths which you by mistake used while performing static timing analysis.

To get to know more about the concepts about Static timing analysis
http://www.vlsichipdesign.com/static%20timing%20analysis
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mohammed.peer



Joined: 29 Oct 2006
Posts: 32
Helped: 1
Location: INDIA


Post11 May 2007 6:16   

Re: How to define Static timing analysis and Dynamic Timing


1. In STA you need not to generate test vectors. But in case of Dyn. Timing you need it.

2. In STA you can check the timing analysis. But in DTA you check functionality also.

3. STA is faster than DTA.

4. STA works only for single clock. But its not there in DTA.
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gck



Joined: 17 Oct 2006
Posts: 149
Helped: 5


Post17 May 2007 5:04   

Re: How to define Static timing analysis and Dynamic Timing


Hi I have very good material on STA and DTA which I ave attached


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