| Author |
Message |
baa110
Joined: 10 Mar 2002 Posts: 15
|
13 Jul 2002 9:04 matlab to vhdl |
|
|
|
hi all
is there any software which convert matlab code to vhdl?
how can i get it?
best regards
baa110
|
|
| Back to top |
|
 |
gabby
Joined: 18 Mar 2002 Posts: 97 Location: Israel
|
13 Jul 2002 17:24 |
|
|
|
Hi
Nice idea but i'am not sure that you will get a compact desing in vhdl,
you are look for easy work but not for the best.
I think you can convert from matlab to c and from c to vhdl(i think is prog from c to vhdl ),
but carefull some time loop function will multiply the desing in vhdl.
Also try ask at matlab for utility maybe they will give you the answer.
Best regards.
|
|
| Back to top |
|
 |
superluminal
Joined: 31 Jan 2002 Posts: 95 Helped: 1 Location: Inside a quantum well
|
13 Jul 2002 23:07 |
|
|
|
Till now I dont know there is some SW to convert C<=> VHDL , so I dont expect you to find such conversion from Matlab to VHDL.
Note: If anyone find SW to convert from C <=> VHDL, please PM
Thanks in advance
|
|
| Back to top |
|
 |
lipton
Joined: 14 Jul 2002 Posts: 51
|
14 Jul 2002 12:42 |
|
|
|
| Here some VHDL->C tool : http://www.co.umist.ac.uk/~xtian/v2c/v2c.html
|
|
| Back to top |
|
 |
synq
Joined: 21 May 2001 Posts: 65
|
15 Jul 2002 14:52 systemgenerator will do the job |
|
|
|
mates..this is what iam crying for last 6 months..
systemgenerator will give vhdl code as well as testbench codes for matlab scripts specific for dsp related apps,,
can anyone provide a full version of system generator
|
|
| Back to top |
|
 |
ZmGor
Joined: 21 Feb 2002 Posts: 37
|
15 Jul 2002 15:12 Re: matlab to vhdl |
|
|
|
http://www.mathworks.com/products/connections/product_main.shtml?prod_id=304
The Xilinx System Generator is a plug-in to Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs. Designers can design and simulate a system using MATLAB, Simulink, and Xilinx library of bit/cycle-true models. The tool will then automatically generate synthesizable Hardware Description Language (HDL) code mapped to Xilinx pre-optimized algorithms.
|
|
| Back to top |
|
 |
The Mechanic
Joined: 06 Dec 2002 Posts: 1
|
06 Dec 2002 0:51 |
|
|
|
www.accelchip.com
Is a company offering Matlab -> VHDL conversion tool.
Like most tools that generate code, it is a bit messy.
|
|
| Back to top |
|
 |
redsk_y
Joined: 01 Jan 2002 Posts: 454 Helped: 1
|
11 Dec 2002 16:25 |
|
|
|
HI
If you work with @ltera, you can try DSP Builder.
It converts SIMULINK models to VHDL code, that can be downloaded
to development board for in circuit testing.
Bye
|
|
| Back to top |
|
 |
hamming
Joined: 13 Dec 2002 Posts: 6
|
13 Dec 2002 13:40 |
|
|
|
There are basically two tools:
-DSP Builder for @ltera devices, and
-System generator for Xilinx devices
I believe System Generator from Xilinx is the better choice
Good luck
|
|
| Back to top |
|
 |
snsriram79
Joined: 08 May 2001 Posts: 75
|
16 Dec 2002 6:45 |
|
|
|
can any1 provide the full version of the system generator
bye
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
26 Jan 2003 14:57 |
|
|
|
Will a simple FIR or IIR filter for input analog signal frequencies of less than 100Hz be able to fit onto a Spartan II with 30K gates?
- Jayson
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
26 Jan 2003 15:04 |
|
|
|
Hi!
Depends on n° of tabs and the n°bits for coeficent, if you are not sure if it fits, you can reduce the numbers of tabs or bits for coef.
Good luck, Bart
P.S. the way you will implement it is also important,
serial -> slow but less slice
parallel -> fast but lot of slice
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
26 Jan 2003 15:10 |
|
|
|
If I have an ADC that is serial, is it better to implement with serial, or convert it to parallel with a shift register?
Seconldly, are there any special considerations for picking the ADC, will any ADC work? The one I'm thinking of is SPI controlled.
- Jayson
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
26 Jan 2003 15:26 |
|
|
|
| Jayson wrote: |
If I have an ADC that is serial, is it better to implement with serial, or convert it to parallel with a shift register? |
Serials inputs are allways converted to parallel, this is simple.
You don't want to us serial buses inside FPGA.
| Jayson wrote: |
| Seconldly, are there any special considerations for picking the ADC, will any ADC work? The one I'm thinking of is SPI controlled. |
Be careful on VCC, see if ADC does not use 5V and your FPGA is only 3.3 tolerant. Fireworks warning.
The other consideration is the sampling freq., you can not use 200Mhz ADC on XC4000 series it is to fast for the FPGA.
The way you controll ADC is not so important, SPI is good and easy to do.
Bart
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
26 Jan 2003 16:44 |
|
|
|
you bring up a good point on VCC issues, how is this typically done in FPGA designs, the majority of chips I'd like to work with are 5V CMOS devices, how do I interface these safely to an FPGA running at a lower I/O voltage of 3.3V or 2.5V? Is there an I/O speed loss with this interface?
- Jayson
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
27 Jan 2003 11:28 |
|
|
|
Hi!
See FPGA family handbook if the device you chose is Vcc tolerant.
| Quote: |
| Is there an I/O speed loss with this interface |
,
if you use resistor it is possible, a little loss, but nothing serius, if you use level translator IC 5V -> 3.3V no loss will apear.
Bart
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
27 Jan 2003 23:18 |
|
|
|
what types of level translators are used with FPGA designs? can you give the names of actual chips to do this?
- Jayson
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
28 Jan 2003 8:25 |
|
|
|
| Jayson wrote: |
what types of level translators are used with FPGA designs? can you give the names of actual chips to do this?
- Jayson |
BIT BIDIRECTIONAL 3.3V TO 5V TRANSLATOR or
BIT BIDIRECTIONAL 5V TO 3.3V TRANSLATOR
74FCT164245T but there are others,
search on google with keyword: Level translator XX V to YY V
Good luck
bart
|
|
| Back to top |
|
 |
nattawoot_s
Joined: 16 Jan 2003 Posts: 9
|
14 Feb 2003 13:46 |
|
|
|
I think that can use follwing software
1 Xilinx system generator
2 @ltera Dspbuilder
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
15 Feb 2003 1:50 |
|
|
|
Where can I buy the 74FCT164245T?
More importantly, where can I buy single quantities of Xilinx FPGA's?
- Jayson
|
|
| Back to top |
|
 |
ieee
Joined: 08 Apr 2002 Posts: 75
|
15 Feb 2003 8:39 Matlab to Vhdl |
|
|
|
The DSP Builder library SignalCompiler block reads Simulink model files (.mdl) and writes out VHDL files and Tcl scripts for hardware implementation and simulation. This HDL design can then be synthesized for implementation in @ltera APEX II, APEX E, FLEX 10K, FLEX 6000, and Mercury device families.
http://www.mathworks.com/products/connections/product_main.shtml?prod_id=368
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
15 Feb 2003 9:18 |
|
|
|
| Jayson wrote: |
| Where can I buy the 74FCT164245T? |
use @vnet,EVB or other worldwide suppliers.
| Jayson wrote: |
More importantly, where can I buy single quantities of Xilinx FPGA's?
- Jayson |
The best way is to by it from the oficial dealer, don't buy it on the "gray market" or from some sub dealers.
Bart
|
|
| Back to top |
|
 |
Jayson
Joined: 08 Oct 2001 Posts: 457 Helped: 17
|
15 Feb 2003 14:55 |
|
|
|
@vnet only deals with companies with big pockets and won't deal with smaller entities.
Likewise for the official dealer.
No idea what EVB is.
- Jayson
|
|
| Back to top |
|
 |
corgan
Joined: 15 Jan 2002 Posts: 56
|
15 Feb 2003 17:05 |
|
|
|
Could the generated codes by Xilinx system generator and @ltera Dspbuilder
be used for ASIC design also?
|
|
| Back to top |
|
 |
igorilla
Joined: 12 Jun 2001 Posts: 85
|
16 Feb 2003 20:59 |
|
|
|
| corgan wrote: |
Could the generated codes by Xilinx system generator and @ltera Dspbuilder
be used for ASIC design also? |
Xilinx System generator use Xilinx Core generator which generates .edif
files for Xilinx devices only.
|
|
| Back to top |
|
 |
Bartart
Joined: 20 Feb 2002 Posts: 127
|
17 Feb 2003 7:58 |
|
|
|
| Jayson wrote: |
| @vnet only deals with companies with big pockets and won't deal with smaller entities. |
No way, you just have to ask them a few times.
| Jayson wrote: |
No idea what EVB is. |
Sorry I mean EBV elektonik, it is a subdealer for @vnet
You can also try at Fernell or Burklin.
Bart
|
|
| Back to top |
|
 |
elcielo
Joined: 13 Jun 2002 Posts: 837 Helped: 6
|
26 Jun 2003 15:20 |
|
|
|
| I want accelfpga.
|
|
| Back to top |
|
 |
sampath09
Joined: 04 Jul 2003 Posts: 1
|
04 Jul 2003 16:44 Re: matlab to vhdl |
|
|
|
Hi
You can convert Simulink based models into VHDL, using System Generator from MathWorks which gives VHDL netlist targetted for Xilinx FPGA's
best Regards
Sidar
hi all
is there any software which convert matlab code to vhdl?
how can i get it?
best regards
baa110[/quote]
|
|
| Back to top |
|
 |
ASIC
Joined: 18 May 2001 Posts: 220
|
04 Jul 2003 16:58 |
|
|
|
Ooops.... I think I asked for something for accelfpga that I cannot ask for here?
ASIC
|
|
| Back to top |
|
 |
Ohh2
Joined: 30 May 2003 Posts: 13
|
19 Sep 2003 10:10 Re: matlab to vhdl |
|
|
|
| Tools such as DSP Builder from @ltera or System generator from Xilinx can be used to generate HDL code directly from Simulink Blockset. Both both tools are not a kind of High-level synthesis tools, whereas the compiler from AccelChip performs high-level synthesis from MATLAB code.
|
|
| Back to top |
|
 |