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ee484
Joined: 04 Jan 2005
Posts: 161
Helped: 2
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 12 Apr 2007 21:55 Anybody has this strange errors? |
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Hi, all,
I am currently doing LVS check on my design. I used digital library that foundary provided. Since , for example inverters, they are pre-defined VDD! GND! already, if I mixed with my own "VDDA" and "VSSA", Calibre gives my an error.
Since I have not included VDD! and GND! in my schematic. (I can see the ports of VDD! and GND! by descending INV).
This kind of mismatching port error gives me an headache.
How do you guys deal with layouts that pre-defined if you want to use your own component?
Thanks,...
BEE
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renwl
Joined: 26 Apr 2004
Posts: 455
Helped: 23
Location: shanghai,china
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| 13 Apr 2007 2:49 Anybody has this strange errors? |
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| It's very dangerous to have the global supply. The most reliable method is to change it by hand.
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penchal_gv
Joined: 04 Feb 2006
Posts: 20
Helped: 1
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| 13 Apr 2007 6:20 Re: Anybody has this strange errors? |
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Hi,
For this one we have to change global power signals by hand or change the ruledeck with these power signal, plz correct if i am wrong.
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ee484
Joined: 04 Jan 2005
Posts: 161
Helped: 2
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| 13 Apr 2007 6:37 Re: Anybody has this strange errors? |
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Not that I want to use global power node (i.e., vdd! and gnd!), but the digital core library from the foundary already vdd! gnd gnd! defined in its layout.
That's why I am having a problem....any suggestion??? Even without any physical wire connection between gnd! (since it has been used in digital library, I used gnd! for my digital part) and AVSS (my analog vss), Calibre LVS check recognize them as connected!
Even in hierarchy structure, for example, I envoke the inverter (from foundary) without assigning any pin on gnd! port, Calibre LVS check recognize that layer as gnd!. What should I do?
Best,
Bee
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