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engrbabarmansoor
Joined: 18 Jan 2007 Posts: 33
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16 Feb 2007 21:27 dynamic and static power dissipation |
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what is the difference between dynamic and static power?
How to calculate them?
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evilguy
Joined: 21 Sep 2005 Posts: 224 Helped: 16
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17 Feb 2007 5:38 Re: dynamic and static power dissipation |
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static power is power dissipation for dc supply only. to calculate is just using the equation P=IV
I= IDDQ
V=VDD
using dc operating point analysis you could obtain those value.
-evilguy-
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gingerjiang
Joined: 01 Mar 2006 Posts: 212 Helped: 11
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17 Feb 2007 6:09 Re: dynamic and static power dissipation |
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| dynamic power dissipation has many cases, such as charging and discharging capacitors, overturn of inverter and latch. simulate the circuit for a long period to calculate the average current the circuit dissipates.
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17 Feb 2007 6:09 Ads |
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maharshi_qis
Joined: 14 Feb 2007 Posts: 247 Helped: 6
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21 Feb 2007 21:02 Re: dynamic and static power dissipation |
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The amount of power that a chip dissipates per unit area is called its power density, and there are two types of power density that concern processor architects: dynamic power density and static power density.
Dynamic Power Density
Each transistor on a chip dissipates a small amount of power when it is switched, and transistors that are switched rapidly dissipate more power than transistors that are switched slowly. The total amount of power dissipated per unit area due to switching of a chip's transistors is called dynamic power density. There are two factors that work together to cause an increase in dynamic power density: clockspeed and transistor density.
Increasing a processor's clockspeed involves switching its transistors more rapidly, and as I just mentioned, transistors that are switched more rapidly dissipate more power. Therefore, as a processor's clockspeed rises, so does its dynamic power density, because each of those rapidly switching transistors contributes more to the device's total power dissipation. You can also increase a chip's dynamic power density by cramming more transistors into the same amount of surface area.
In addition to clockspeed-related increases in dynamic power density, chip designers must also contend with the fact that even transistors that aren't switching will still leak current during idle periods, much like how a faucet that is shut off can still leak water if the water pressure behind it is high enough. This leakage current causes an idle transistor to constantly dissipate a trace amount of power. The amount of power dissipated per unit area due to leakage current is called static power density.
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faizalism
Joined: 03 Feb 2006 Posts: 63 Location: Malaysia
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22 Feb 2007 4:06 Re: dynamic and static power dissipation |
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Hi,
Dynamic = Switching + Short Circuit (when the transistors in ON state)
Static = Leakage Power (Sub-threshold + GIDL + .....) (when the transistors in OFF state)
Maybe you can refer to the IEEE Journal on Low Power
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rmadhukarthi
Joined: 12 Feb 2007 Posts: 14
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23 Feb 2007 16:37 Re: dynamic and static power dissipation |
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refer to "Digital integrated circuits" by Jan Rabey.
Dynamic power dissipation=F*C*Vdd*Vdd
F=Frequency
C-capacitance
Vdd-power supply
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