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dbshailesh
Joined: 13 Feb 2007 Posts: 8 Location: Bangalore
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13 Feb 2007 13:07 dft rules |
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Removed
Last edited by dbshailesh on 27 Sep 2007 15:42; edited 1 time in total |
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omara007
Joined: 06 Jan 2003 Posts: 1279 Helped: 39 Location: Dubai
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13 Feb 2007 13:24 DFT Rules |
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| try "Advanced ASIC Chip Synthesis using Synopsys DC, Physical Compiler and PT" book.
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maksya
Joined: 02 Jun 2005 Posts: 172 Helped: 13
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13 Feb 2007 16:00 DFT Rules |
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| Boundary Scan (JTAG) is one of the most popular parts of DfT.
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dft_guy
Joined: 19 Oct 2006 Posts: 114 Helped: 14 Location: USA
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13 Feb 2007 20:31 Re: DFT Rules |
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A good starter might be:
h**p://www.caip.rutgers.edu/~bushnell/COURSE/lec23.ppt
It's one of the powerpoint presentations that went into making
"Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits"
By Bushnell and Agrawal
John
h**p://www.dftdigest.com
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dbshailesh
Joined: 13 Feb 2007 Posts: 8 Location: Bangalore
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19 Feb 2007 13:15 DFT Rules |
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Hi ,
Can any one send the attachment of all dft rules and the solutions.
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Google AdSense

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19 Feb 2007 13:15 Ads |
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dft_guy
Joined: 19 Oct 2006 Posts: 114 Helped: 14 Location: USA
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20 Feb 2007 5:01 Re: DFT Rules |
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I'm sorry dbshailesh, but can you be more specific about that which you are applying design-for-test? DFT is too big a big subject for someone to "post all dft rules and the solutions".
John
h**p://www.dftdigest.com
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dtn_me
Joined: 23 Feb 2004 Posts: 25 Helped: 2
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23 Feb 2007 10:00 Re: DFT Rules |
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Basic DFT rules include: ( I remember only these)
1. Clock & data should not change at same time.
2. No combinational loopbacks
3. Clock should not feed data input.
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dft_guy
Joined: 19 Oct 2006 Posts: 114 Helped: 14 Location: USA
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28 Feb 2007 15:38 Re: DFT Rules |
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I just posted a list of 'top 10 scan design rules' over at DFT Digest. If you're looking for a complete set, and have access to Mentor documentation, you could look in the 'DFT Common Resources Manual' and they have all their DRCs listed.
John
h**p://www.dftdigest.com[/url]
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