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RISC & CISC

 
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CHANDAN10



Joined: 11 Jan 2007
Posts: 23
Post23 Jan 2007 10:59   RISC & CISC
WHAT IS THE DIFFERENCE BEETWEEN RISC & CISC MACHINE
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tectona



Joined: 24 Mar 2006
Posts: 54
Helped: 3
Post23 Jan 2007 13:43   Re: RISC & CISC
Dear CHANDAN10

Following link give information about RISC & CISC


1) http://cse.stanford.edu/class/sophomore-college/projects-00/risc/risccisc/

2) http://www.google.co.in/url?sa=t&ct=res&cd=23&url=http%3A%2F%2Fwww.egr.msu.edu%2Fclasses%2Fece482%2FTeams%2F97fall%2Fxdesign2%2Farm%2Fandy.doc&ei=hPS1RZ_tD4_msAK0uORU&usg=__THweTPxEHTremss6zNcpIqRuY8c=&sig2=a5T_fbiQKV3GZNSbmWnD3A

Regards
Tectona
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mathuranathan



Joined: 11 Sep 2006
Posts: 196
Helped: 22
Location: Chennai
Post23 Jan 2007 13:54   Re: RISC & CISC
See the following links:

www.tomax7.com/aplus/APlusCD/CISC%20vs%20RISC.doc

http://www.heyrick.co.uk/assembler/riscvcisc.html
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saubhik



Joined: 27 Apr 2007
Posts: 108
Helped: 3
Location: Mumbai
Post06 May 2008 6:47   Re: RISC & CISC
just go through the following attachment .... I think your problem can be solved by this .....




ok ..... take care and Good Bye ......

Sorry, but you need login in to view this attachment
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sayimpu



Joined: 03 May 2008
Posts: 17
Location: BANGALORE
Post09 May 2008 7:08   RISC & CISC
RISC vs CISC – Architecture

RISC features
1.Fixed width instructions
2.Few formats of instructions
3.Load/Store Architecture
4.Large Register bank
5.Instructions are pipelinable
6.Hardwired instruction decode
7.Single cycle execution of instruction
power:A few hundreds of milliwatts
compute speed:200-520 Mega Hz
cost:dollars
environment:High Temp, Low EM Emissions



CISC:______________
1.Variable length instruction
2.Several formats of instructions
3.Memory values can be used as operands in instructions
4.Small Register Bank
5.Cannot pipeline instructions
6.Microcode ROMS instruction decoder
7.Multi cycle execution on instruction
power:many watts
cost:tens to hundread of dollaors
speed:2-5 Mhz
environmental:Needs Fans, FCC/CE approval an issue
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