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diff b/w RTL and HDL

 
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niranr



Joined: 20 Dec 2006
Posts: 4


Post20 Dec 2006 9:34   diff b/w RTL and HDL

can anyone give exact answer for difference between an RTL code and HDL Code???[/b]
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truebs



Joined: 21 Jan 2005
Posts: 322
Helped: 19
Location: Asia


Post20 Dec 2006 9:55   Re: diff b/w RTL and HDL

The difference i think is mainly theoretical. In reality , RTL is gained by writing a HDL only. so the difference is quite subtle.

We can take HDL as a way to achieve a RTL.

Hope it helps..cya
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elec_student



Joined: 21 Nov 2005
Posts: 53
Helped: 4


Post20 Dec 2006 10:07   Re: diff b/w RTL and HDL

An HDL is simply hardware descriptive language such as VHDL , Verilog etc. Now these languages supports constructs which are synthesizable as well as non synthesizable.

Any HDL code , written in any model(behavirola, structural etc.) becomes an RTL in official terms only when it is is synthesizable. If an HDL code contains constructs such as (wait) which are not synthesizable then that code cannot be stated as RTL as we cannot generate hardware from that code.

I hope now it is clear.
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rakesh1234



Joined: 12 Dec 2006
Posts: 90
Helped: 6


Post20 Dec 2006 11:42   Re: diff b/w RTL and HDL

rtl means register transfer logic
hdl means hardware discription language
basicallly rtl is the representation of a hardware in higher level of abstraction in text format interms of high level language llike if else statemant etc.
the hdl is one of the way to write rtl code
that means the hdl is a language to represent the hardware in rtl.
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shivakumar043



Joined: 28 Apr 2006
Posts: 22
Location: BANGALORE


Post20 Dec 2006 15:40   Re: diff b/w RTL and HDL

HDL is harwarre description language . One can write RTL using HDL
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salma ali bakr



Joined: 27 Jan 2006
Posts: 945
Helped: 79


Post21 Dec 2006 4:29   Re: diff b/w RTL and HDL

Behavioral synthesis allows the translation and optimization of a behavioral description, or a high-level model, into an RTL implementation.
RTL: register transfer level
it's when ur design is in the form of registers that are scheduled, allocated and connected according to certain optimization algorithms and available resources
in other words "synthesizable" and can be realized on hardware:)
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sumit_techkgp



Joined: 01 Apr 2007
Posts: 135
Helped: 3


Post14 Apr 2007 5:12   diff b/w RTL and HDL

RTL is a code written in HDL
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