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Manual floorplanning of FPGA designs
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Elephantus



Joined: 11 Jul 2005
Posts: 31
Helped: 4
Post31 Oct 2006 14:51   

fpga floorplanning
Can anyone suggest where to look for for resources and tutorials on manual FPGA design floorplanning, possibly for Xilinx chips?

I would appreciate any help.
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richardyue



Joined: 18 Aug 2006
Posts: 97
Helped: 1
Post01 Nov 2006 14:11   

floorplanner php
Hi, Elephantus,
Maybe the following link will solve your problem. I don't know how to make floorplanning either, but I will try my best to understand how it works. Hope we both can make rapid progress in it. http://www.edacafe.com/books/ASIC/Book/CH16/CH16.php
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Post01 Nov 2006 14:11   

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adamsogood



Joined: 15 Jun 2006
Posts: 32
Post01 Nov 2006 22:59   

xilinx floorplanner guide
I just found an interesting link about Xilinx floorplanning. After carefully reviewing it, I recommend to our community. The author uses a 10-bit counter as an example and proposed 7 ways of floorplanning for comparisons. Although the Xilinx chip is out of date and the example is very simple, it showcased the basic concepts of carry logic, relative location, basic guidelines of FPGA floorplanning, and so on. It is a little lengthy, please read it with patience. I already learned a lot. Smile

http://www.fliptronics.com/floorplanning1.html
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echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566
Post02 Nov 2006 0:53   

floorplanning fpga
If you are floorplanning large devices, you may like Xilinx PlanAhead. It is software-assisted manual floorplanning. You can get an evaluation copy, or simply read the docs and watch the videos on their web site.
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